From mboxrd@z Thu Jan 1 00:00:00 1970 From: Scott Wood Subject: Re: [PATCH 2/2] KVM: PPC: Book3E: Get vcpu's last instruction for emulation Date: Tue, 9 Jul 2013 19:12:31 -0500 Message-ID: <1373415151.8183.213@snotra> References: Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; delsp=Yes; format=Flowed Content-Transfer-Encoding: 8BIT Cc: Mihai Caraman , , , To: Alexander Graf Return-path: In-Reply-To: (from agraf@suse.de on Tue Jul 9 16:45:10 2013) Content-Disposition: inline Sender: kvm-ppc-owner@vger.kernel.org List-Id: kvm.vger.kernel.org On 07/09/2013 04:45:10 PM, Alexander Graf wrote: > > On 28.06.2013, at 11:20, Mihai Caraman wrote: > > > + /* Get page size */ > > + if (MAS0_GET_TLBSEL(mfspr(SPRN_MAS0)) == 0) > > + psize_shift = PAGE_SHIFT; > > + else > > + psize_shift = MAS1_GET_TSIZE(mas1) + 10; > > + > > + mas7_mas3 = (((u64) mfspr(SPRN_MAS7)) << 32) | > > + mfspr(SPRN_MAS3); > > + addr = (mas7_mas3 & (~0ULL << psize_shift)) | > > + (geaddr & ((1ULL << psize_shift) - 1ULL)); > > + > > + /* Map a page and get guest's instruction */ > > + page = pfn_to_page(addr >> PAGE_SHIFT); > > While looking at this I just realized that you're missing a check > here. What if our IP is in some PCI BAR? Or can't we execute from > those? We at least need to check pfn_valid() first. That'll just keep us from accessing a bad pointer in the host kernel, though -- it won't make the emulation actually work. If we need that, we'll probably need to create a temporary TLB entry manually. -Scott