From mboxrd@z Thu Jan 1 00:00:00 1970 From: Arthur Chunqi Li Subject: [PATCH v4] KVM: nVMX: Set segment infomation of L1 when L2 exits Date: Mon, 15 Jul 2013 15:21:54 +0800 Message-ID: <1373872914-24344-1-git-send-email-yzt356@gmail.com> Cc: gleb@redhat.com, pbonzini@redhat.com, jan.kiszka@web.de, Arthur Chunqi Li To: kvm@vger.kernel.org Return-path: Received: from mail-pa0-f44.google.com ([209.85.220.44]:52544 "EHLO mail-pa0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751144Ab3GOHWL (ORCPT ); Mon, 15 Jul 2013 03:22:11 -0400 Received: by mail-pa0-f44.google.com with SMTP id lj1so10877958pab.31 for ; Mon, 15 Jul 2013 00:22:10 -0700 (PDT) Sender: kvm-owner@vger.kernel.org List-ID: When L2 exits to L1, segment infomations of L1 are not set correctly. According to Intel SDM 27.5.2(Loading Host Segment and Descriptor Table Registers), segment base/limit/access right of L1 should be set to some designed value when L2 exits to L1. This patch fixes this. Signed-off-by: Arthur Chunqi Li --- arch/x86/kvm/vmx.c | 55 ++++++++++++++++++++++++++++++++++++++++++---------- 1 file changed, 45 insertions(+), 10 deletions(-) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 064d0be..85b302b 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -7948,6 +7948,8 @@ static void prepare_vmcs12(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12) static void load_vmcs12_host_state(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12) { + struct kvm_segment seg; + if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_EFER) vcpu->arch.efer = vmcs12->host_ia32_efer; else if (vmcs12->vm_exit_controls & VM_EXIT_HOST_ADDR_SPACE_SIZE) @@ -8001,16 +8003,6 @@ static void load_vmcs12_host_state(struct kvm_vcpu *vcpu, vmcs_writel(GUEST_SYSENTER_EIP, vmcs12->host_ia32_sysenter_eip); vmcs_writel(GUEST_IDTR_BASE, vmcs12->host_idtr_base); vmcs_writel(GUEST_GDTR_BASE, vmcs12->host_gdtr_base); - vmcs_writel(GUEST_TR_BASE, vmcs12->host_tr_base); - vmcs_writel(GUEST_GS_BASE, vmcs12->host_gs_base); - vmcs_writel(GUEST_FS_BASE, vmcs12->host_fs_base); - vmcs_write16(GUEST_ES_SELECTOR, vmcs12->host_es_selector); - vmcs_write16(GUEST_CS_SELECTOR, vmcs12->host_cs_selector); - vmcs_write16(GUEST_SS_SELECTOR, vmcs12->host_ss_selector); - vmcs_write16(GUEST_DS_SELECTOR, vmcs12->host_ds_selector); - vmcs_write16(GUEST_FS_SELECTOR, vmcs12->host_fs_selector); - vmcs_write16(GUEST_GS_SELECTOR, vmcs12->host_gs_selector); - vmcs_write16(GUEST_TR_SELECTOR, vmcs12->host_tr_selector); if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_PAT) vmcs_write64(GUEST_IA32_PAT, vmcs12->host_ia32_pat); @@ -8018,6 +8010,49 @@ static void load_vmcs12_host_state(struct kvm_vcpu *vcpu, vmcs_write64(GUEST_IA32_PERF_GLOBAL_CTRL, vmcs12->host_ia32_perf_global_ctrl); + /* Set L1 segment info according to Intel SDM + 27.5.2 Loading Host Segment and Descriptor-Table Registers */ + memset(&seg, 0, sizeof(struct kvm_segment)); + seg.base = 0; + seg.limit = 0xFFFFFFFF; + seg.selector = vmcs12->host_cs_selector; + seg.type = 11; + seg.present = 1; + if (vmcs12->vm_exit_controls & VM_EXIT_HOST_ADDR_SPACE_SIZE) + seg.l = 1; + else + seg.db = 1; + seg.s = 1; + seg.g = 1; + vmx_set_segment(vcpu, &seg, VCPU_SREG_CS); + memset(&seg, 0, sizeof(struct kvm_segment)); + seg.base = 0; + seg.limit = 0xFFFFFFFF; + seg.type = 3; + seg.present = 1; + seg.s = 1; + seg.db = 1; + seg.g = 1; + seg.selector = vmcs12->host_ds_selector; + vmx_set_segment(vcpu, &seg, VCPU_SREG_DS); + seg.selector = vmcs12->host_es_selector; + vmx_set_segment(vcpu, &seg, VCPU_SREG_ES); + seg.selector = vmcs12->host_ss_selector; + vmx_set_segment(vcpu, &seg, VCPU_SREG_SS); + seg.selector = vmcs12->host_fs_selector; + seg.base = vmcs12->host_fs_base; + vmx_set_segment(vcpu, &seg, VCPU_SREG_FS); + seg.selector = vmcs12->host_gs_selector; + seg.base = vmcs12->host_gs_base; + vmx_set_segment(vcpu, &seg, VCPU_SREG_GS); + memset(&seg, 0, sizeof(struct kvm_segment)); + seg.base = vmcs12->host_tr_base; + seg.limit = 0x67; + seg.selector = vmcs12->host_tr_selector; + seg.type = 11; + seg.present = 1; + vmx_set_segment(vcpu, &seg, VCPU_SREG_TR); + kvm_set_dr(vcpu, 7, 0x400); vmcs_write64(GUEST_IA32_DEBUGCTL, 0); } -- 1.7.9.5