From: Alexander Graf <agraf@suse.de>
To: kvm@vger.kernel.org
Cc: kvm-ppc@vger.kernel.org, gleb@redhat.com,
Paolo Bonzini <pbonzini@redhat.com>,
Anton Blanchard <anton@samba.org>,
Paul Mackerras <paulus@samba.org>
Subject: [PULL 32/36] KVM: PPC: Book3S HV: Basic little-endian guest support
Date: Wed, 29 Jan 2014 17:13:11 +0100 [thread overview]
Message-ID: <1391011995-4891-33-git-send-email-agraf@suse.de> (raw)
In-Reply-To: <1391011995-4891-1-git-send-email-agraf@suse.de>
From: Anton Blanchard <anton@samba.org>
We create a guest MSR from scratch when delivering exceptions in
a few places. Instead of extracting LPCR[ILE] and inserting it
into MSR_LE each time, we simply create a new variable intr_msr which
contains the entire MSR to use. For a little-endian guest, userspace
needs to set the ILE (interrupt little-endian) bit in the LPCR for
each vcpu (or at least one vcpu in each virtual core).
[paulus@samba.org - removed H_SET_MODE implementation from original
version of the patch, and made kvmppc_set_lpcr update vcpu->arch.intr_msr.]
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
---
arch/powerpc/include/asm/kvm_host.h | 1 +
arch/powerpc/kernel/asm-offsets.c | 1 +
arch/powerpc/kvm/book3s_64_mmu_hv.c | 2 +-
arch/powerpc/kvm/book3s_hv.c | 22 ++++++++++++++++++++++
arch/powerpc/kvm/book3s_hv_rmhandlers.S | 15 +++++----------
5 files changed, 30 insertions(+), 11 deletions(-)
diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
index d161bc0..7726a3b 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -636,6 +636,7 @@ struct kvm_vcpu_arch {
spinlock_t tbacct_lock;
u64 busy_stolen;
u64 busy_preempt;
+ unsigned long intr_msr;
#endif
};
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 239a857..a60a2fd 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -480,6 +480,7 @@ int main(void)
DEFINE(VCPU_DAR, offsetof(struct kvm_vcpu, arch.shregs.dar));
DEFINE(VCPU_VPA, offsetof(struct kvm_vcpu, arch.vpa.pinned_addr));
DEFINE(VCPU_VPA_DIRTY, offsetof(struct kvm_vcpu, arch.vpa.dirty));
+ DEFINE(VCPU_INTR_MSR, offsetof(struct kvm_vcpu, arch.intr_msr));
#endif
#ifdef CONFIG_PPC_BOOK3S
DEFINE(VCPU_VCPUID, offsetof(struct kvm_vcpu, vcpu_id));
diff --git a/arch/powerpc/kvm/book3s_64_mmu_hv.c b/arch/powerpc/kvm/book3s_64_mmu_hv.c
index efb8aa5..22cc895 100644
--- a/arch/powerpc/kvm/book3s_64_mmu_hv.c
+++ b/arch/powerpc/kvm/book3s_64_mmu_hv.c
@@ -262,7 +262,7 @@ int kvmppc_mmu_hv_init(void)
static void kvmppc_mmu_book3s_64_hv_reset_msr(struct kvm_vcpu *vcpu)
{
- kvmppc_set_msr(vcpu, MSR_SF | MSR_ME);
+ kvmppc_set_msr(vcpu, vcpu->arch.intr_msr);
}
/*
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index eb4eed4..3195e4f 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -788,6 +788,27 @@ static void kvmppc_set_lpcr(struct kvm_vcpu *vcpu, u64 new_lpcr)
spin_lock(&vc->lock);
/*
+ * If ILE (interrupt little-endian) has changed, update the
+ * MSR_LE bit in the intr_msr for each vcpu in this vcore.
+ */
+ if ((new_lpcr & LPCR_ILE) != (vc->lpcr & LPCR_ILE)) {
+ struct kvm *kvm = vcpu->kvm;
+ struct kvm_vcpu *vcpu;
+ int i;
+
+ mutex_lock(&kvm->lock);
+ kvm_for_each_vcpu(i, vcpu, kvm) {
+ if (vcpu->arch.vcore != vc)
+ continue;
+ if (new_lpcr & LPCR_ILE)
+ vcpu->arch.intr_msr |= MSR_LE;
+ else
+ vcpu->arch.intr_msr &= ~MSR_LE;
+ }
+ mutex_unlock(&kvm->lock);
+ }
+
+ /*
* Userspace can only modify DPFD (default prefetch depth),
* ILE (interrupt little-endian) and TC (translation control).
* On POWER8 userspace can also modify AIL (alt. interrupt loc.)
@@ -1155,6 +1176,7 @@ static struct kvm_vcpu *kvmppc_core_vcpu_create_hv(struct kvm *kvm,
spin_lock_init(&vcpu->arch.vpa_update_lock);
spin_lock_init(&vcpu->arch.tbacct_lock);
vcpu->arch.busy_preempt = TB_NIL;
+ vcpu->arch.intr_msr = MSR_SF | MSR_ME;
kvmppc_mmu_book3s_hv_init(vcpu);
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 5629934..ecb7635 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -812,8 +812,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
12: mtspr SPRN_SRR0, r10
mr r10,r0
mtspr SPRN_SRR1, r11
- li r11,(MSR_ME << 1) | 1 /* synthesize MSR_SF | MSR_ME */
- rotldi r11,r11,63
+ ld r11, VCPU_INTR_MSR(r4)
5:
/*
@@ -1551,8 +1550,7 @@ kvmppc_hdsi:
mtspr SPRN_SRR0, r10
mtspr SPRN_SRR1, r11
li r10, BOOK3S_INTERRUPT_DATA_STORAGE
- li r11, (MSR_ME << 1) | 1 /* synthesize MSR_SF | MSR_ME */
- rotldi r11, r11, 63
+ ld r11, VCPU_INTR_MSR(r9)
fast_interrupt_c_return:
6: ld r7, VCPU_CTR(r9)
lwz r8, VCPU_XER(r9)
@@ -1621,8 +1619,7 @@ kvmppc_hisi:
1: mtspr SPRN_SRR0, r10
mtspr SPRN_SRR1, r11
li r10, BOOK3S_INTERRUPT_INST_STORAGE
- li r11, (MSR_ME << 1) | 1 /* synthesize MSR_SF | MSR_ME */
- rotldi r11, r11, 63
+ ld r11, VCPU_INTR_MSR(r9)
b fast_interrupt_c_return
3: ld r6, VCPU_KVM(r9) /* not relocated, use VRMA */
@@ -1665,8 +1662,7 @@ sc_1_fast_return:
mtspr SPRN_SRR0,r10
mtspr SPRN_SRR1,r11
li r10, BOOK3S_INTERRUPT_SYSCALL
- li r11, (MSR_ME << 1) | 1 /* synthesize MSR_SF | MSR_ME */
- rotldi r11, r11, 63
+ ld r11, VCPU_INTR_MSR(r9)
mr r4,r9
b fast_guest_return
@@ -1994,8 +1990,7 @@ machine_check_realmode:
beq mc_cont
/* If not, deliver a machine check. SRR0/1 are already set */
li r10, BOOK3S_INTERRUPT_MACHINE_CHECK
- li r11, (MSR_ME << 1) | 1 /* synthesize MSR_SF | MSR_ME */
- rotldi r11, r11, 63
+ ld r11, VCPU_INTR_MSR(r9)
b fast_interrupt_c_return
/*
--
1.8.1.4
next prev parent reply other threads:[~2014-01-29 16:13 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-29 16:12 [PULL 00/36] ppc patch queue 2014-01-29 Alexander Graf
2014-01-29 16:12 ` [PULL 01/36] powerpc: kvm: optimize "sc 1" as fast return Alexander Graf
2014-01-29 16:12 ` [PULL 02/36] KVM: PPC: Add devname:kvm aliases for modules Alexander Graf
2014-01-29 16:12 ` [PULL 03/36] KVM: PPC: fix couple of memory leaks in MPIC/XICS devices Alexander Graf
2014-01-29 16:12 ` [PULL 04/36] kvm/powerpc: rename kvm_hypercall() to epapr_hypercall() Alexander Graf
2014-01-29 16:12 ` [PULL 05/36] kvm/powerpc: move kvm_hypercall0() and friends to epapr_hypercall0() Alexander Graf
2014-01-29 16:12 ` [PULL 06/36] KVM: PPC: Use load_fp/vr_state rather than load_up_fpu/altivec Alexander Graf
2014-01-29 16:12 ` [PULL 07/36] KVM: PPC: Store FP/VSX/VMX state in thread_fp/vr_state structures Alexander Graf
2014-01-29 16:12 ` [PULL 08/36] KVM: PPC: Load/save FP/VMX/VSX state directly to/from vcpu struct Alexander Graf
2014-01-29 16:12 ` [PULL 09/36] KVM: PPC: Book3S HV: Use load/store_fp_state functions in HV guest entry/exit Alexander Graf
2014-01-29 16:12 ` [PULL 10/36] kvm: booke: clear host tlb reference flag on guest tlb invalidation Alexander Graf
2014-01-29 16:12 ` [PULL 11/36] kvm: book3s: rename lookup_linux_pte() to lookup_linux_pte_and_update() Alexander Graf
2014-01-29 16:12 ` [PULL 12/36] kvm: powerpc: define a linux pte lookup function Alexander Graf
2014-01-29 16:12 ` [PULL 13/36] kvm: powerpc: use caching attributes as per linux pte Alexander Graf
2014-01-29 16:12 ` [PULL 14/36] KVM: PPC: Book3E HV: call RECONCILE_IRQ_STATE to sync the software state Alexander Graf
2014-01-29 16:12 ` [PULL 15/36] KVM: PPC: NULL return of kvmppc_mmu_hpte_cache_next should be handled Alexander Graf
2014-01-29 16:12 ` [PULL 16/36] KVM: PPC: Unify kvmppc_get_last_inst and sc Alexander Graf
2014-01-29 16:12 ` [PULL 17/36] KVM: PPC: Book3S: MMIO emulation support for little endian guests Alexander Graf
2014-01-29 16:12 ` [PULL 18/36] KVM: PPC: Book3S HV: use xics_wake_cpu only when defined Alexander Graf
2014-01-29 16:12 ` [PULL 19/36] KVM: PPC: e500: Fix bad address type in deliver_tlb_misss() Alexander Graf
2014-01-29 16:12 ` [PULL 20/36] kvm/ppc: IRQ disabling cleanup Alexander Graf
2014-01-29 16:13 ` [PULL 21/36] KVM: PPC: Book3S HV: Don't set DABR on POWER8 Alexander Graf
2014-01-29 16:13 ` [PULL 22/36] KVM: PPC: Book3S HV: Align physical and virtual CPU thread numbers Alexander Graf
2014-01-29 16:13 ` [PULL 23/36] KVM: PPC: Book3S HV: Context-switch new POWER8 SPRs Alexander Graf
2014-01-29 16:13 ` [PULL 24/36] KVM: PPC: Book3S HV: Flush the correct number of TLB sets on POWER8 Alexander Graf
2014-01-29 16:13 ` [PULL 25/36] KVM: PPC: Book3S HV: Add handler for HV facility unavailable Alexander Graf
2014-01-29 16:13 ` [PULL 26/36] KVM: PPC: Book3S HV: Implement architecture compatibility modes for POWER8 Alexander Graf
2014-01-29 16:13 ` [PULL 27/36] KVM: PPC: Book3S HV: Consolidate code that checks reason for wake from nap Alexander Graf
2014-01-29 16:13 ` [PULL 28/36] KVM: PPC: Book3S HV: Handle guest using doorbells for IPIs Alexander Graf
2014-01-29 16:13 ` [PULL 29/36] KVM: PPC: Book3S HV: Handle new LPCR bits on POWER8 Alexander Graf
2014-01-29 16:13 ` [PULL 30/36] KVM: PPC: Book3S HV: Prepare for host using hypervisor doorbells Alexander Graf
2014-01-29 16:13 ` [PULL 31/36] KVM: PPC: Book3S HV: Add support for DABRX register on POWER7 Alexander Graf
2014-01-29 16:13 ` Alexander Graf [this message]
2014-01-29 16:13 ` [PULL 33/36] powerpc/Kconfig: Make TM select VSX and VMX Alexander Graf
2014-01-29 16:13 ` [PULL 34/36] KVM: PPC: Book3S HV: Add new state for transactional memory Alexander Graf
2014-01-29 16:13 ` [PULL 35/36] KVM: PPC: Book3S HV: Add software abort codes " Alexander Graf
2014-01-29 16:13 ` [PULL 36/36] KVM: PPC: Book3S PR: Cope with doorbell interrupts Alexander Graf
2014-01-29 17:31 ` [PULL 00/36] ppc patch queue 2014-01-29 Paolo Bonzini
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