From: Alexander Graf <agraf@suse.de>
To: kvm@vger.kernel.org
Cc: kvm-ppc@vger.kernel.org, gleb@redhat.com,
Paolo Bonzini <pbonzini@redhat.com>,
Michael Neuling <mikey@neuling.org>,
Paul Mackerras <paulus@samba.org>
Subject: [PULL 34/36] KVM: PPC: Book3S HV: Add new state for transactional memory
Date: Wed, 29 Jan 2014 17:13:13 +0100 [thread overview]
Message-ID: <1391011995-4891-35-git-send-email-agraf@suse.de> (raw)
In-Reply-To: <1391011995-4891-1-git-send-email-agraf@suse.de>
From: Michael Neuling <mikey@neuling.org>
Add new state for transactional memory (TM) to kvm_vcpu_arch. Also add
asm-offset bits that are going to be required.
This also moves the existing TFHAR, TFIAR and TEXASR SPRs into a
CONFIG_PPC_TRANSACTIONAL_MEM section. This requires some code changes to
ensure we still compile with CONFIG_PPC_TRANSACTIONAL_MEM=N. Much of the added
the added #ifdefs are removed in a later patch when the bulk of the TM code is
added.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
[agraf: fix merge conflict]
Signed-off-by: Alexander Graf <agraf@suse.de>
---
arch/powerpc/include/asm/kvm_host.h | 24 +++++++++--
arch/powerpc/kernel/asm-offsets.c | 19 +++++++--
arch/powerpc/kvm/book3s_hv.c | 4 ++
arch/powerpc/kvm/book3s_hv_rmhandlers.S | 75 ++++++++++++++++++++++++++++++++-
4 files changed, 114 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
index 7726a3b..1eaea2d 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -475,9 +475,6 @@ struct kvm_vcpu_arch {
ulong ppr;
ulong pspb;
ulong fscr;
- ulong tfhar;
- ulong tfiar;
- ulong texasr;
ulong ebbhr;
ulong ebbrr;
ulong bescr;
@@ -526,6 +523,27 @@ struct kvm_vcpu_arch {
u64 siar;
u64 sdar;
u64 sier;
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
+ u64 tfhar;
+ u64 texasr;
+ u64 tfiar;
+
+ u32 cr_tm;
+ u64 lr_tm;
+ u64 ctr_tm;
+ u64 amr_tm;
+ u64 ppr_tm;
+ u64 dscr_tm;
+ u64 tar_tm;
+
+ ulong gpr_tm[32];
+
+ struct thread_fp_state fp_tm;
+
+ struct thread_vr_state vr_tm;
+ u32 vrsave_tm; /* also USPRG0 */
+
+#endif
#ifdef CONFIG_KVM_EXIT_TIMING
struct mutex exit_timing_lock;
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index a60a2fd..687f2eb 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -521,9 +521,6 @@ int main(void)
DEFINE(VCPU_PPR, offsetof(struct kvm_vcpu, arch.ppr));
DEFINE(VCPU_FSCR, offsetof(struct kvm_vcpu, arch.fscr));
DEFINE(VCPU_PSPB, offsetof(struct kvm_vcpu, arch.pspb));
- DEFINE(VCPU_TFHAR, offsetof(struct kvm_vcpu, arch.tfhar));
- DEFINE(VCPU_TFIAR, offsetof(struct kvm_vcpu, arch.tfiar));
- DEFINE(VCPU_TEXASR, offsetof(struct kvm_vcpu, arch.texasr));
DEFINE(VCPU_EBBHR, offsetof(struct kvm_vcpu, arch.ebbhr));
DEFINE(VCPU_EBBRR, offsetof(struct kvm_vcpu, arch.ebbrr));
DEFINE(VCPU_BESCR, offsetof(struct kvm_vcpu, arch.bescr));
@@ -545,6 +542,22 @@ int main(void)
DEFINE(VCPU_SLB_E, offsetof(struct kvmppc_slb, orige));
DEFINE(VCPU_SLB_V, offsetof(struct kvmppc_slb, origv));
DEFINE(VCPU_SLB_SIZE, sizeof(struct kvmppc_slb));
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
+ DEFINE(VCPU_TFHAR, offsetof(struct kvm_vcpu, arch.tfhar));
+ DEFINE(VCPU_TFIAR, offsetof(struct kvm_vcpu, arch.tfiar));
+ DEFINE(VCPU_TEXASR, offsetof(struct kvm_vcpu, arch.texasr));
+ DEFINE(VCPU_GPR_TM, offsetof(struct kvm_vcpu, arch.gpr_tm));
+ DEFINE(VCPU_FPRS_TM, offsetof(struct kvm_vcpu, arch.fp_tm.fpr));
+ DEFINE(VCPU_VRS_TM, offsetof(struct kvm_vcpu, arch.vr_tm.vr));
+ DEFINE(VCPU_VRSAVE_TM, offsetof(struct kvm_vcpu, arch.vrsave_tm));
+ DEFINE(VCPU_CR_TM, offsetof(struct kvm_vcpu, arch.cr_tm));
+ DEFINE(VCPU_LR_TM, offsetof(struct kvm_vcpu, arch.lr_tm));
+ DEFINE(VCPU_CTR_TM, offsetof(struct kvm_vcpu, arch.ctr_tm));
+ DEFINE(VCPU_AMR_TM, offsetof(struct kvm_vcpu, arch.amr_tm));
+ DEFINE(VCPU_PPR_TM, offsetof(struct kvm_vcpu, arch.ppr_tm));
+ DEFINE(VCPU_DSCR_TM, offsetof(struct kvm_vcpu, arch.dscr_tm));
+ DEFINE(VCPU_TAR_TM, offsetof(struct kvm_vcpu, arch.tar_tm));
+#endif
#ifdef CONFIG_PPC_BOOK3S_64
#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 3195e4f..f4a4c5c 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -875,6 +875,7 @@ static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
case KVM_REG_PPC_IAMR:
*val = get_reg_val(id, vcpu->arch.iamr);
break;
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
case KVM_REG_PPC_TFHAR:
*val = get_reg_val(id, vcpu->arch.tfhar);
break;
@@ -884,6 +885,7 @@ static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
case KVM_REG_PPC_TEXASR:
*val = get_reg_val(id, vcpu->arch.texasr);
break;
+#endif
case KVM_REG_PPC_FSCR:
*val = get_reg_val(id, vcpu->arch.fscr);
break;
@@ -1033,6 +1035,7 @@ static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
case KVM_REG_PPC_IAMR:
vcpu->arch.iamr = set_reg_val(id, *val);
break;
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
case KVM_REG_PPC_TFHAR:
vcpu->arch.tfhar = set_reg_val(id, *val);
break;
@@ -1042,6 +1045,7 @@ static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
case KVM_REG_PPC_TEXASR:
vcpu->arch.texasr = set_reg_val(id, *val);
break;
+#endif
case KVM_REG_PPC_FSCR:
vcpu->arch.fscr = set_reg_val(id, *val);
break;
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index ecb7635..dfa144c 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -701,13 +701,15 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
ld r6, VCPU_VTB(r4)
mtspr SPRN_IC, r5
mtspr SPRN_VTB, r6
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
ld r5, VCPU_TFHAR(r4)
ld r6, VCPU_TFIAR(r4)
ld r7, VCPU_TEXASR(r4)
- ld r8, VCPU_EBBHR(r4)
mtspr SPRN_TFHAR, r5
mtspr SPRN_TFIAR, r6
mtspr SPRN_TEXASR, r7
+#endif
+ ld r8, VCPU_EBBHR(r4)
mtspr SPRN_EBBHR, r8
ld r5, VCPU_EBBRR(r4)
ld r6, VCPU_BESCR(r4)
@@ -1118,13 +1120,15 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
std r5, VCPU_IC(r9)
std r6, VCPU_VTB(r9)
std r7, VCPU_TAR(r9)
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
mfspr r5, SPRN_TFHAR
mfspr r6, SPRN_TFIAR
mfspr r7, SPRN_TEXASR
- mfspr r8, SPRN_EBBHR
std r5, VCPU_TFHAR(r9)
std r6, VCPU_TFIAR(r9)
std r7, VCPU_TEXASR(r9)
+#endif
+ mfspr r8, SPRN_EBBHR
std r8, VCPU_EBBHR(r9)
mfspr r5, SPRN_EBBRR
mfspr r6, SPRN_BESCR
@@ -1497,6 +1501,73 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
1: addi r8,r8,16
.endr
+ /* Save DEC */
+ mfspr r5,SPRN_DEC
+ mftb r6
+ extsw r5,r5
+ add r5,r5,r6
+ std r5,VCPU_DEC_EXPIRES(r9)
+
+BEGIN_FTR_SECTION
+ b 8f
+END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
+ /* Turn on TM so we can access TFHAR/TFIAR/TEXASR */
+ mfmsr r8
+ li r0, 1
+ rldimi r8, r0, MSR_TM_LG, 63-MSR_TM_LG
+ mtmsrd r8
+
+ /* Save POWER8-specific registers */
+ mfspr r5, SPRN_IAMR
+ mfspr r6, SPRN_PSPB
+ mfspr r7, SPRN_FSCR
+ std r5, VCPU_IAMR(r9)
+ stw r6, VCPU_PSPB(r9)
+ std r7, VCPU_FSCR(r9)
+ mfspr r5, SPRN_IC
+ mfspr r6, SPRN_VTB
+ mfspr r7, SPRN_TAR
+ std r5, VCPU_IC(r9)
+ std r6, VCPU_VTB(r9)
+ std r7, VCPU_TAR(r9)
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
+ mfspr r5, SPRN_TFHAR
+ mfspr r6, SPRN_TFIAR
+ mfspr r7, SPRN_TEXASR
+ std r5, VCPU_TFHAR(r9)
+ std r6, VCPU_TFIAR(r9)
+ std r7, VCPU_TEXASR(r9)
+#endif
+ mfspr r8, SPRN_EBBHR
+ std r8, VCPU_EBBHR(r9)
+ mfspr r5, SPRN_EBBRR
+ mfspr r6, SPRN_BESCR
+ mfspr r7, SPRN_CSIGR
+ mfspr r8, SPRN_TACR
+ std r5, VCPU_EBBRR(r9)
+ std r6, VCPU_BESCR(r9)
+ std r7, VCPU_CSIGR(r9)
+ std r8, VCPU_TACR(r9)
+ mfspr r5, SPRN_TCSCR
+ mfspr r6, SPRN_ACOP
+ mfspr r7, SPRN_PID
+ mfspr r8, SPRN_WORT
+ std r5, VCPU_TCSCR(r9)
+ std r6, VCPU_ACOP(r9)
+ stw r7, VCPU_GUEST_PID(r9)
+ std r8, VCPU_WORT(r9)
+8:
+
+ /* Save and reset AMR and UAMOR before turning on the MMU */
+BEGIN_FTR_SECTION
+ mfspr r5,SPRN_AMR
+ mfspr r6,SPRN_UAMOR
+ std r5,VCPU_AMR(r9)
+ std r6,VCPU_UAMOR(r9)
+ li r6,0
+ mtspr SPRN_AMR,r6
+END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
+
/* Unset guest mode */
li r0, KVM_GUEST_MODE_NONE
stb r0, HSTATE_IN_GUEST(r13)
--
1.8.1.4
next prev parent reply other threads:[~2014-01-29 16:13 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-29 16:12 [PULL 00/36] ppc patch queue 2014-01-29 Alexander Graf
2014-01-29 16:12 ` [PULL 01/36] powerpc: kvm: optimize "sc 1" as fast return Alexander Graf
2014-01-29 16:12 ` [PULL 02/36] KVM: PPC: Add devname:kvm aliases for modules Alexander Graf
2014-01-29 16:12 ` [PULL 03/36] KVM: PPC: fix couple of memory leaks in MPIC/XICS devices Alexander Graf
2014-01-29 16:12 ` [PULL 04/36] kvm/powerpc: rename kvm_hypercall() to epapr_hypercall() Alexander Graf
2014-01-29 16:12 ` [PULL 05/36] kvm/powerpc: move kvm_hypercall0() and friends to epapr_hypercall0() Alexander Graf
2014-01-29 16:12 ` [PULL 06/36] KVM: PPC: Use load_fp/vr_state rather than load_up_fpu/altivec Alexander Graf
2014-01-29 16:12 ` [PULL 07/36] KVM: PPC: Store FP/VSX/VMX state in thread_fp/vr_state structures Alexander Graf
2014-01-29 16:12 ` [PULL 08/36] KVM: PPC: Load/save FP/VMX/VSX state directly to/from vcpu struct Alexander Graf
2014-01-29 16:12 ` [PULL 09/36] KVM: PPC: Book3S HV: Use load/store_fp_state functions in HV guest entry/exit Alexander Graf
2014-01-29 16:12 ` [PULL 10/36] kvm: booke: clear host tlb reference flag on guest tlb invalidation Alexander Graf
2014-01-29 16:12 ` [PULL 11/36] kvm: book3s: rename lookup_linux_pte() to lookup_linux_pte_and_update() Alexander Graf
2014-01-29 16:12 ` [PULL 12/36] kvm: powerpc: define a linux pte lookup function Alexander Graf
2014-01-29 16:12 ` [PULL 13/36] kvm: powerpc: use caching attributes as per linux pte Alexander Graf
2014-01-29 16:12 ` [PULL 14/36] KVM: PPC: Book3E HV: call RECONCILE_IRQ_STATE to sync the software state Alexander Graf
2014-01-29 16:12 ` [PULL 15/36] KVM: PPC: NULL return of kvmppc_mmu_hpte_cache_next should be handled Alexander Graf
2014-01-29 16:12 ` [PULL 16/36] KVM: PPC: Unify kvmppc_get_last_inst and sc Alexander Graf
2014-01-29 16:12 ` [PULL 17/36] KVM: PPC: Book3S: MMIO emulation support for little endian guests Alexander Graf
2014-01-29 16:12 ` [PULL 18/36] KVM: PPC: Book3S HV: use xics_wake_cpu only when defined Alexander Graf
2014-01-29 16:12 ` [PULL 19/36] KVM: PPC: e500: Fix bad address type in deliver_tlb_misss() Alexander Graf
2014-01-29 16:12 ` [PULL 20/36] kvm/ppc: IRQ disabling cleanup Alexander Graf
2014-01-29 16:13 ` [PULL 21/36] KVM: PPC: Book3S HV: Don't set DABR on POWER8 Alexander Graf
2014-01-29 16:13 ` [PULL 22/36] KVM: PPC: Book3S HV: Align physical and virtual CPU thread numbers Alexander Graf
2014-01-29 16:13 ` [PULL 23/36] KVM: PPC: Book3S HV: Context-switch new POWER8 SPRs Alexander Graf
2014-01-29 16:13 ` [PULL 24/36] KVM: PPC: Book3S HV: Flush the correct number of TLB sets on POWER8 Alexander Graf
2014-01-29 16:13 ` [PULL 25/36] KVM: PPC: Book3S HV: Add handler for HV facility unavailable Alexander Graf
2014-01-29 16:13 ` [PULL 26/36] KVM: PPC: Book3S HV: Implement architecture compatibility modes for POWER8 Alexander Graf
2014-01-29 16:13 ` [PULL 27/36] KVM: PPC: Book3S HV: Consolidate code that checks reason for wake from nap Alexander Graf
2014-01-29 16:13 ` [PULL 28/36] KVM: PPC: Book3S HV: Handle guest using doorbells for IPIs Alexander Graf
2014-01-29 16:13 ` [PULL 29/36] KVM: PPC: Book3S HV: Handle new LPCR bits on POWER8 Alexander Graf
2014-01-29 16:13 ` [PULL 30/36] KVM: PPC: Book3S HV: Prepare for host using hypervisor doorbells Alexander Graf
2014-01-29 16:13 ` [PULL 31/36] KVM: PPC: Book3S HV: Add support for DABRX register on POWER7 Alexander Graf
2014-01-29 16:13 ` [PULL 32/36] KVM: PPC: Book3S HV: Basic little-endian guest support Alexander Graf
2014-01-29 16:13 ` [PULL 33/36] powerpc/Kconfig: Make TM select VSX and VMX Alexander Graf
2014-01-29 16:13 ` Alexander Graf [this message]
2014-01-29 16:13 ` [PULL 35/36] KVM: PPC: Book3S HV: Add software abort codes for transactional memory Alexander Graf
2014-01-29 16:13 ` [PULL 36/36] KVM: PPC: Book3S PR: Cope with doorbell interrupts Alexander Graf
2014-01-29 17:31 ` [PULL 00/36] ppc patch queue 2014-01-29 Paolo Bonzini
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1391011995-4891-35-git-send-email-agraf@suse.de \
--to=agraf@suse.de \
--cc=gleb@redhat.com \
--cc=kvm-ppc@vger.kernel.org \
--cc=kvm@vger.kernel.org \
--cc=mikey@neuling.org \
--cc=paulus@samba.org \
--cc=pbonzini@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox