From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alex Williamson Subject: Re: [PATCH 2/4] KVM: ioapic: clear IRR for edge-triggered interrupts at delivery Date: Thu, 20 Mar 2014 14:26:16 -0600 Message-ID: <1395347176.632.41.camel@ul30vt.home> References: <1395154495-22807-1-git-send-email-pbonzini@redhat.com> <1395154495-22807-3-git-send-email-pbonzini@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Cc: linux-kernel@vger.kernel.org, gleb@kernel.org, mtosatti@redhat.com, kvm@vger.kernel.org To: Paolo Bonzini Return-path: In-Reply-To: <1395154495-22807-3-git-send-email-pbonzini@redhat.com> Sender: linux-kernel-owner@vger.kernel.org List-Id: kvm.vger.kernel.org On Tue, 2014-03-18 at 15:54 +0100, Paolo Bonzini wrote: > This ensures that IRR bits are set in the KVM_GET_IRQCHIP result only if > the interrupt is still sitting in the IOAPIC. After the next patches, it > avoids spurious reinjection of the interrupt when KVM_SET_IRQCHIP is > called. > > Signed-off-by: Paolo Bonzini > --- > virt/kvm/ioapic.c | 3 +++ > 1 file changed, 3 insertions(+) Makes sense Reviewed-by: Alex Williamson > diff --git a/virt/kvm/ioapic.c b/virt/kvm/ioapic.c > index 0b4914147b9d..25e16a6898ed 100644 > --- a/virt/kvm/ioapic.c > +++ b/virt/kvm/ioapic.c > @@ -288,6 +288,9 @@ static int ioapic_service(struct kvm_ioapic *ioapic, int irq, bool line_status) > irqe.level = 1; > irqe.shorthand = 0; > > + if (irqe.trig_mode == IOAPIC_EDGE_TRIG) > + ioapic->irr &= ~(1 << irq); > + > if (irq == RTC_GSI && line_status) { > BUG_ON(ioapic->rtc_status.pending_eoi != 0); > ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe,