From: Wei Wang <wei.w.wang@intel.com>
To: kvm@vger.kernel.org
Cc: pbonzini@redhat.com, alex.williamson@redhat.com,
Wei Wang <wei.w.wang@intel.com>,
Yang Zhang <yang.z.zhang@intel.com>
Subject: [PATCH v2] KVM: x86: keep eoi exit bitmap accurate before loading it.
Date: Wed, 27 Aug 2014 22:05:31 +0800 [thread overview]
Message-ID: <1409148331-5964-1-git-send-email-wei.w.wang@intel.com> (raw)
Guest may mask the IOAPIC entry before issue EOI. In such case,
EOI will not be intercepted by the hypervisor, since the corresponding
bit in eoi_exit_bitmap is not set after the masking of IOAPIC entry.
The solution here is to OR eoi_exit_bitmap with tmr to make sure that
all level-triggered interrupts have their bits in eoi_exit_bitmap set.
Tested-by: Rongrong Liu <rongrongx.liu@intel.com>
Signed-off-by: Yang Zhang <yang.z.zhang@intel.com>
Signed-off-by: Wei Wang <wei.w.wang@intel.com>
---
arch/x86/kvm/lapic.c | 12 ++++++++++++
arch/x86/kvm/lapic.h | 1 +
arch/x86/kvm/x86.c | 1 +
virt/kvm/ioapic.c | 7 ++++---
4 files changed, 18 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 8c1162d..0fcac3c 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -539,6 +539,18 @@ void kvm_apic_update_tmr(struct kvm_vcpu *vcpu, u32 *tmr)
}
}
+void kvm_apic_update_eoi_exitmap(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap)
+{
+ struct kvm_lapic *apic = vcpu->arch.apic;
+ u32 i;
+ u32 tmr;
+
+ for (i = 0; i < 8; i++) {
+ tmr = kvm_apic_get_reg(apic, APIC_TMR + 0x10 * i);
+ *((u32 *)eoi_exit_bitmap + i) |= tmr;
+ }
+}
+
static void apic_update_ppr(struct kvm_lapic *apic)
{
u32 tpr, isrv, ppr, old_ppr;
diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h
index 6a11845..d2b96f2 100644
--- a/arch/x86/kvm/lapic.h
+++ b/arch/x86/kvm/lapic.h
@@ -55,6 +55,7 @@ void kvm_apic_set_version(struct kvm_vcpu *vcpu);
void kvm_apic_update_tmr(struct kvm_vcpu *vcpu, u32 *tmr);
void kvm_apic_update_irr(struct kvm_vcpu *vcpu, u32 *pir);
+void kvm_apic_update_eoi_exitmap(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
int kvm_apic_match_physical_addr(struct kvm_lapic *apic, u16 dest);
int kvm_apic_match_logical_addr(struct kvm_lapic *apic, u8 mda);
int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq,
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index d401684..d23b558 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -5992,6 +5992,7 @@ static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
kvm_apic_update_tmr(vcpu, tmr);
+ kvm_apic_update_eoi_exitmap(vcpu, eoi_exit_bitmap);
kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
}
diff --git a/virt/kvm/ioapic.c b/virt/kvm/ioapic.c
index e8ce34c..ed15936 100644
--- a/virt/kvm/ioapic.c
+++ b/virt/kvm/ioapic.c
@@ -254,9 +254,10 @@ void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap,
spin_lock(&ioapic->lock);
for (index = 0; index < IOAPIC_NUM_PINS; index++) {
e = &ioapic->redirtbl[index];
- if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG ||
- kvm_irq_has_notifier(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index) ||
- index == RTC_GSI) {
+ if ((!e->fields.mask
+ && e->fields.trig_mode == IOAPIC_LEVEL_TRIG)
+ || kvm_irq_has_notifier(ioapic->kvm, KVM_IRQCHIP_IOAPIC,
+ index) || index == RTC_GSI) {
if (kvm_apic_match_dest(vcpu, NULL, 0,
e->fields.dest_id, e->fields.dest_mode)) {
__set_bit(e->fields.vector,
--
1.7.1
next reply other threads:[~2014-08-27 5:41 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-27 14:05 Wei Wang [this message]
2014-08-27 14:27 ` [PATCH v2] KVM: x86: keep eoi exit bitmap accurate before loading it Paolo Bonzini
2014-08-28 6:17 ` Zhang, Yang Z
2014-08-28 8:44 ` Paolo Bonzini
2014-08-28 10:14 ` Wang, Wei W
2014-08-28 11:00 ` Paolo Bonzini
2014-08-29 0:59 ` Wang, Wei W
2014-09-04 2:23 ` Wang, Wei W
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