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From: Alex Williamson <alex.williamson@redhat.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
	yang.z.zhang@intel.com, srutherford@intel.com
Subject: Re: [PATCH 0/2] KVM: x86: limit interactions between IOAPIC and LAPIC
Date: Wed, 29 Jul 2015 14:00:12 -0600	[thread overview]
Message-ID: <1438200012.13460.74.camel@redhat.com> (raw)
In-Reply-To: <1438177055-26764-1-git-send-email-pbonzini@redhat.com>

On Wed, 2015-07-29 at 15:37 +0200, Paolo Bonzini wrote:
> Inspired by the split irqchip patches, this series limits the
> IOAPIC<->LAPIC to the EOI exit bitmap that is inferred from the
> redirection table.
> 
> TMR is entirely handled within the local APIC, and no global copy
> of the IOAPIC-handled vectors is necessary anymore.  This makes
> it simpler to introduce a userspace IOAPIC.
> 
> Tested with ioapic.flat for now, planning to do more complete tests
> tomorrow.  The most interesting test to do here is an assigned device
> that uses INTX, so I am CCing Alex Williamson for a heads up.

Tested Windows and Linux guests with assigned devices restricted to INTx
mode, no obvious regression.  Thanks,

Alex

> Paolo Bonzini (2):
>   KVM: x86: set TMR when the interrupt is accepted
>   KVM: x86: store IOAPIC-handled vectors in each VCPU
> 
>  arch/x86/include/asm/kvm_host.h |  3 ++-
>  arch/x86/kvm/ioapic.c           | 27 ++++-----------------------
>  arch/x86/kvm/ioapic.h           | 11 +----------
>  arch/x86/kvm/lapic.c            | 29 ++++++++++++++++++-----------
>  arch/x86/kvm/lapic.h            |  1 -
>  arch/x86/kvm/svm.c              |  2 +-
>  arch/x86/kvm/vmx.c              |  3 ++-
>  arch/x86/kvm/x86.c              | 11 +++--------
>  8 files changed, 31 insertions(+), 56 deletions(-)
> 

      parent reply	other threads:[~2015-07-29 20:00 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-29 13:37 [PATCH 0/2] KVM: x86: limit interactions between IOAPIC and LAPIC Paolo Bonzini
2015-07-29 13:37 ` [PATCH 1/2] KVM: x86: set TMR when the interrupt is accepted Paolo Bonzini
2015-07-30  3:39   ` Steve Rutherford
2015-07-30 23:26   ` Zhang, Yang Z
2015-07-31  2:49     ` Steve Rutherford
2015-07-31  7:57       ` Paolo Bonzini
2015-08-03  2:44         ` Zhang, Yang Z
2015-07-31  8:01     ` Paolo Bonzini
2015-08-03  2:37       ` Zhang, Yang Z
2015-08-03  8:10         ` Paolo Bonzini
2015-08-03 10:23           ` Zhang, Yang Z
2015-08-03 10:55             ` Paolo Bonzini
2015-08-04  0:46               ` Zhang, Yang Z
2015-08-04  6:59                 ` Paolo Bonzini
2015-08-04  7:21                   ` Zhang, Yang Z
2015-08-13  6:35                   ` Zhang, Yang Z
2015-08-13  7:31                     ` Paolo Bonzini
2015-09-02 22:38                       ` Steve Rutherford
2015-09-03  5:18                         ` Nakajima, Jun
2015-09-03  7:38                           ` Paolo Bonzini
2015-07-29 13:37 ` [PATCH 2/2] KVM: x86: store IOAPIC-handled vectors in each VCPU Paolo Bonzini
2015-07-30  3:55   ` Steve Rutherford
2015-07-30  7:19     ` Paolo Bonzini
2015-07-29 20:00 ` Alex Williamson [this message]

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