From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Jones Subject: [kvm-unit-tests PATCH 12/18] lib/arm: add flush_tlb_page mmu function Date: Thu, 5 Nov 2015 18:24:37 -0600 Message-ID: <1446769483-21586-13-git-send-email-drjones@redhat.com> References: <1446769483-21586-1-git-send-email-drjones@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: QUOTED-PRINTABLE Cc: alex.bennee@linaro.org, cov@codeaurora.org To: pbonzini@redhat.com, kvm@vger.kernel.org Return-path: Received: from mx1.redhat.com ([209.132.183.28]:54482 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966038AbbKFAZX (ORCPT ); Thu, 5 Nov 2015 19:25:23 -0500 In-Reply-To: <1446769483-21586-1-git-send-email-drjones@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: =46rom: Alex Benn=C3=A9e This introduces a new flush_tlb_page function which does exactly what you expect. It's going to be useful for the future TLB torture test. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Andrew Jones --- lib/arm/asm/mmu.h | 11 +++++++++++ lib/arm64/asm/mmu.h | 8 ++++++++ 2 files changed, 19 insertions(+) diff --git a/lib/arm/asm/mmu.h b/lib/arm/asm/mmu.h index c1bd01c9ee1b9..2bb0cde820f8a 100644 --- a/lib/arm/asm/mmu.h +++ b/lib/arm/asm/mmu.h @@ -14,8 +14,11 @@ #define PTE_AF PTE_EXT_AF #define PTE_WBWA L_PTE_MT_WRITEALLOC =20 +/* See B3.18.7 TLB maintenance operations */ + static inline void local_flush_tlb_all(void) { + /* TLBIALL */ asm volatile("mcr p15, 0, %0, c8, c7, 0" :: "r" (0)); dsb(); isb(); @@ -27,6 +30,14 @@ static inline void flush_tlb_all(void) local_flush_tlb_all(); } =20 +static inline void flush_tlb_page(unsigned long vaddr) +{ + /* TLBIMVAA */ + asm volatile("mcr p15, 0, %0, c8, c7, 3" :: "r" (vaddr)); + dsb(); + isb(); +} + #include =20 #endif /* __ASMARM_MMU_H_ */ diff --git a/lib/arm64/asm/mmu.h b/lib/arm64/asm/mmu.h index 18b4d6be18fae..3bc31c91c36f8 100644 --- a/lib/arm64/asm/mmu.h +++ b/lib/arm64/asm/mmu.h @@ -19,6 +19,14 @@ static inline void flush_tlb_all(void) isb(); } =20 +static inline void flush_tlb_page(unsigned long vaddr) +{ + unsigned long page =3D vaddr >> 12; + dsb(ishst); + asm("tlbi vaae1is, %0" :: "r" (page)); + dsb(ish); +} + #include =20 #endif /* __ASMARM64_MMU_H_ */ --=20 2.4.3