From: Paolo Bonzini <pbonzini@redhat.com>
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: rkrcmar@redhat.com, yang.zhang.wz@gmail.com, feng.wu@intel.com,
mst@redhat.com
Subject: [PATCH 1/5] KVM: x86: avoid atomic operations on APICv vmentry
Date: Fri, 14 Oct 2016 20:21:27 +0200 [thread overview]
Message-ID: <1476469291-5039-2-git-send-email-pbonzini@redhat.com> (raw)
In-Reply-To: <1476469291-5039-1-git-send-email-pbonzini@redhat.com>
On some benchmarks (e.g. netperf with ioeventfd disabled), APICv
posted interrupts turn out to be slower than interrupt injection via
KVM_REQ_EVENT.
This patch optimizes a bit the IRR update, avoiding expensive atomic
operations in the common case where PI.ON=0 at vmentry or the PIR vector
is mostly zero. This saves at least 20 cycles (1%) per vmexit, as
measured by kvm-unit-tests' inl_from_qemu test (20 runs):
| enable_apicv=1 | enable_apicv=0
| mean stdev | mean stdev
----------|-----------------|------------------
before | 5826 32.65 | 5765 47.09
after | 5809 43.42 | 5777 77.02
Of course, any change in the right column is just placebo effect. :)
The savings are bigger if interrupts are frequent.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
arch/x86/kvm/lapic.c | 6 ++++--
arch/x86/kvm/vmx.c | 9 ++++++++-
2 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 23b99f305382..63a442aefc12 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -342,9 +342,11 @@ void __kvm_apic_update_irr(u32 *pir, void *regs)
u32 i, pir_val;
for (i = 0; i <= 7; i++) {
- pir_val = xchg(&pir[i], 0);
- if (pir_val)
+ pir_val = READ_ONCE(pir[i]);
+ if (pir_val) {
+ pir_val = xchg(&pir[i], 0);
*((u32 *)(regs + APIC_IRR + i * 0x10)) |= pir_val;
+ }
}
}
EXPORT_SYMBOL_GPL(__kvm_apic_update_irr);
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 2577183b40d9..7c79d6c6b6ed 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -521,6 +521,12 @@ static inline void pi_set_sn(struct pi_desc *pi_desc)
(unsigned long *)&pi_desc->control);
}
+static inline void pi_clear_on(struct pi_desc *pi_desc)
+{
+ clear_bit(POSTED_INTR_ON,
+ (unsigned long *)&pi_desc->control);
+}
+
static inline int pi_test_on(struct pi_desc *pi_desc)
{
return test_bit(POSTED_INTR_ON,
@@ -4854,9 +4860,10 @@ static void vmx_sync_pir_to_irr(struct kvm_vcpu *vcpu)
{
struct vcpu_vmx *vmx = to_vmx(vcpu);
- if (!pi_test_and_clear_on(&vmx->pi_desc))
+ if (!pi_test_on(&vmx->pi_desc))
return;
+ pi_clear_on(&vmx->pi_desc);
kvm_apic_update_irr(vcpu, vmx->pi_desc.pir);
}
--
1.8.3.1
next prev parent reply other threads:[~2016-10-14 18:21 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-14 18:21 [PATCH 0/5] KVM: x86: cleanup and minimal speedup for APICv Paolo Bonzini
2016-10-14 18:21 ` Paolo Bonzini [this message]
2016-10-14 18:50 ` [PATCH 1/5] KVM: x86: avoid atomic operations on APICv vmentry Nadav Amit
2016-10-14 18:56 ` Paolo Bonzini
2016-10-14 19:44 ` Nadav Amit
2016-10-15 7:47 ` Paolo Bonzini
2016-10-16 2:29 ` Michael S. Tsirkin
2016-10-19 11:45 ` Paul E. McKenney
2016-10-26 21:50 ` Michael S. Tsirkin
2016-10-16 3:21 ` Michael S. Tsirkin
2016-10-17 11:07 ` Paolo Bonzini
2016-10-26 19:53 ` Radim Krčmář
2016-10-26 21:42 ` Michael S. Tsirkin
2016-10-27 16:44 ` Radim Krčmář
2016-10-27 16:51 ` Michael S. Tsirkin
2016-10-27 17:06 ` Radim Krčmář
2016-10-28 9:39 ` Paolo Bonzini
2016-10-28 22:04 ` Michael S. Tsirkin
2016-10-14 18:21 ` [PATCH 2/5] KVM: x86: do not scan IRR twice " Paolo Bonzini
2016-10-18 6:04 ` Wanpeng Li
2016-10-26 19:59 ` Radim Krčmář
2016-11-03 13:30 ` Paolo Bonzini
2016-11-03 13:53 ` Michael S. Tsirkin
2016-11-03 16:01 ` Paolo Bonzini
2016-11-03 15:03 ` Radim Krčmář
2016-11-03 16:00 ` Paolo Bonzini
2016-11-03 18:07 ` Radim Krčmář
2016-11-03 18:18 ` Paolo Bonzini
2016-11-03 18:29 ` Radim Krčmář
2016-11-03 20:16 ` Radim Krčmář
2016-11-04 9:38 ` Paolo Bonzini
2016-10-14 18:21 ` [PATCH 3/5] KVM: x86: do not use KVM_REQ_EVENT for APICv interrupt injection Paolo Bonzini
2016-10-26 20:05 ` Radim Krčmář
2016-10-14 18:21 ` [PATCH 4/5] KVM: x86: remove unnecessary sync_pir_to_irr Paolo Bonzini
2016-10-26 20:28 ` Radim Krčmář
2016-10-14 18:21 ` [PATCH 5/5] KVM: vmx: clear pending interrupts on KVM_SET_LAPIC Paolo Bonzini
2016-10-26 20:08 ` Radim Krčmář
2016-10-26 21:52 ` [PATCH 0/5] KVM: x86: cleanup and minimal speedup for APICv Michael S. Tsirkin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1476469291-5039-2-git-send-email-pbonzini@redhat.com \
--to=pbonzini@redhat.com \
--cc=feng.wu@intel.com \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mst@redhat.com \
--cc=rkrcmar@redhat.com \
--cc=yang.zhang.wz@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).