From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tianyu Lan Subject: [Patch V2] KVM/x86: Fix references to CR0.PG and CR4.PAE in kvm_valid_sregs() Date: Fri, 19 Jan 2018 11:09:43 +0800 Message-ID: <1516331383-7240-1-git-send-email-Tianyu.Lan@microsoft.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Tianyu Lan , pbonzini@redhat.com, rkrcmar@redhat.com, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, jeremi.piotrowski@gmail.com, ebiggers3@gmail.com To: unlisted-recipients:; (no To-header on input) Return-path: Received: from mail-pf0-f193.google.com ([209.85.192.193]:44141 "EHLO mail-pf0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754890AbeASDKD (ORCPT ); Thu, 18 Jan 2018 22:10:03 -0500 Sender: kvm-owner@vger.kernel.org List-ID: kvm_valid_sregs() should use X86_CR0_PG and X86_CR4_PAE to check bit status rather than X86_CR0_PG_BIT and X86_CR4_PAE_BIT. This patch is to fix it. Fixes: f29810335965 (“KVM/x86: Check input paging mode when cs.l is set") Reported-by: Jeremi Piotrowski Cc: Paolo Bonzini Cc: Radim Krčmář Signed-off-by: Tianyu Lan --- Change since v1: Rename title and fix change log. --- arch/x86/kvm/x86.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 1cec2c6..c53298d 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -7496,13 +7496,13 @@ EXPORT_SYMBOL_GPL(kvm_task_switch); int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) { - if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG_BIT)) { + if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) { /* * When EFER.LME and CR0.PG are set, the processor is in * 64-bit mode (though maybe in a 32-bit code segment). * CR4.PAE and EFER.LMA must be set. */ - if (!(sregs->cr4 & X86_CR4_PAE_BIT) + if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA)) return -EINVAL; } else { -- 2.7.4