From mboxrd@z Thu Jan 1 00:00:00 1970 From: Babu Moger Subject: [PATCH v4 0/5] Enable TOPOEXT to support hyperthreading on AMD CPU Date: Mon, 12 Mar 2018 17:00:44 -0400 Message-ID: <1520888449-4352-1-git-send-email-babu.moger@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Cc: Thomas.Lendacky@amd.com, brijesh.singh@amd.com, kvm@vger.kernel.org, kash@tripleback.net, mtosatti@redhat.com, Gary.Hook@amd.com, qemu-devel@nongnu.org, babu.moger@amd.com To: pbonzini@redhat.com, rth@twiddle.net, ehabkost@redhat.com, rkrcmar@redhat.com Return-path: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+gceq-qemu-devel2=m.gmane.org@nongnu.org Sender: "Qemu-devel" List-Id: kvm.vger.kernel.org This series enables the TOPOEXT feature for AMD CPUs. This is required to support hyperthreading on kvm guests. This addresses the issues reported in these bugs: https://bugzilla.redhat.com/show_bug.cgi?id=3D1481253 https://bugs.launchpad.net/qemu/+bug/1703506=20 v4: 1.Removed the checks under cpuid 0x8000001D leaf(patch #2). These check are not necessary. Found this during internal review. 2.Added CPUID_EXT3_TOPOEXT feature for all the 17 family(patch #4). This wa= s found by Kash Pande during his testing. 3.Removed th hardcoded cpuid xlevel and dynamically extended if CPUID_EXT3_= TOPOEXT is supported(Suggested by Brijesh Singh).=20 v3: 1.Removed the patch #1. Radim mentioned that original typo problem is in=20 linux kernel header. qemu is just copying those files. 2.In previous version, I used the cpuid 4 definitions for AMDs cpuid leaf 0x8000001D. CPUID 4 is very intel specific and we dont want to expose tho= se details under AMD. I have renamed some of these definitions as generic. These changes are in patch#1. Radim, let me know if this is what you inte= nded. 3.Added assert to for core_id(Suggested by Radim Kr=C4=8Dm=C3=A1=C5=99). 4.Changed the if condition under "L3 cache info"(Suggested by Gary Hook). 5.Addressed few more text correction and code cleanup(Suggested by Thomas L= endacky). v2: Fixed few more minor issues per Gary Hook's comments. Thank you Gary. Removed the patch#1. We need to handle the instruction cache associativit= y=20 seperately. It varies based on the cpu family. I will comeback to that la= ter. Added two more typo corrections in patch#1 and patch#5. v1: Stanislav Lanci posted few patches earlier.=20 https://patchwork.kernel.org/patch/10040903/ Rebased his patches with few changes. 1.Spit the patches into two, separating cpuid functions=20 0x8000001D and 0x8000001E (Patch 2 and 3). 2.Removed the generic non-intel check and made a separate patch with some changes(Patch 5). 3.Fixed L3_N_SETS_AMD(from 4096 to 8192) based on CPUID_Fn8000001D_ECX_x03. Added 2 more patches. Patch 1. Fixes cache associativity. Patch 4. Adds TOPOEXT feature on AMD EPYC CPU. Babu Moger (3): target/i386: Generalize some of the macro definitions target/i386: Enable TOPOEXT feature on AMD EPYC CPU target/i386: Remove generic SMT thread check Stanislav Lanci (2): target/i386: Populate AMD Processor Cache Information target/i386: Add support for CPUID_8000_001E for AMD target/i386/cpu.c | 150 +++++++++++++++++++++++++++++++++++++++++---------= ---- target/i386/kvm.c | 29 +++++++++-- 2 files changed, 142 insertions(+), 37 deletions(-) --=20 1.8.3.1