[PATCH v9 12/17] x86/split_lock: Enable split lock detection by default

Fenghua Yu
2019-06-18T22:52:37Z

A split locked access locks bus and degrades overall memory access
performance. When split lock detection feature is enumerated, enable
the feature by default by writing 1 to bit 29 in MSR TEST_CTL to find
any split lock issue.

Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
---
arch/x86/kernel/cpu/intel.c | 13 +++++++++++++
1 file changed, 13 insertions(+)

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 16cf1631b7f9..4ccd890a45b0 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -627,6 +627,13 @@ static void init_intel_misc_features(struct cpuinfo_x86 *c)
wrmsrl(MSR_MISC_FEATURES_ENABLES, msr);
}

+static void split_lock_update_msr(void)
+{
+ /* Enable split lock detection */
+ this_cpu_or(msr_test_ctl_cached, MSR_TEST_CTL_SPLIT_LOCK_DETECT);
+ wrmsrl(MSR_TEST_CTL, this_cpu_read(msr_test_ctl_cached));
+}
+
static void split_lock_init(struct cpuinfo_x86 *c)
{
if (cpu_has(c, X86_FEATURE_SPLIT_LOCK_DETECT)) {
@@ -635,6 +642,8 @@ static void split_lock_init(struct cpuinfo_x86 *c)
/* Cache MSR TEST_CTL */
rdmsrl(MSR_TEST_CTL, test_ctl_val);
this_cpu_write(msr_test_ctl_cached, test_ctl_val);
+
+ split_lock_update_msr();
}
}

@@ -1012,9 +1021,13 @@ static const struct cpu_dev intel_cpu_dev = {

cpu_dev_register(intel_cpu_dev);

+#undef pr_fmt
+#define pr_fmt(fmt) "x86/split lock detection: " fmt
+
static void __init split_lock_setup(void)
{
setup_force_cpu_cap(X86_FEATURE_SPLIT_LOCK_DETECT);
+ pr_info("enabled\n");
}

void __init cpu_set_core_cap_bits(struct cpuinfo_x86 *c)
--
2.19.1