From: Paolo Bonzini <pbonzini@redhat.com>
To: Jim Mattson <jmattson@google.com>
Cc: KarimAllah Ahmed <karahmed@amazon.com>,
KarimAllah Ahmed <karahmed@amazon.de>,
kvm list <kvm@vger.kernel.org>,
LKML <linux-kernel@vger.kernel.org>,
the arch/x86 maintainers <x86@kernel.org>,
Asit Mallick <asit.k.mallick@intel.com>,
Arjan Van De Ven <arjan.van.de.ven@intel.com>,
Dave Hansen <dave.hansen@intel.com>,
Andi Kleen <ak@linux.intel.com>,
Andrea Arcangeli <aarcange@redhat.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
Tim Chen <tim.c.chen@linux.intel.com>,
Thomas Gleixner <tglx@linutronix.de>,
Dan Williams <dan.j.williams@intel.com>,
Jun Nakajima <jun.nakajima@intel.com>,
David Woodhouse <dwmw@amazon.co.uk>,
Greg KH <gregkh@linuxfoundation.org>,
Andy Lutomirski <luto@kernel.org>,
Ashok Raj <ashok.raj@intel.com>
Subject: Re: [PATCH v5 4/5] KVM: VMX: Allow direct access to MSR_IA32_SPEC_CTRL
Date: Wed, 31 Jan 2018 16:00:43 -0500 [thread overview]
Message-ID: <16d89e09-fbfc-4a08-00a6-40cfb4776018@redhat.com> (raw)
In-Reply-To: <CALMp9eT677DU=EGoezcyjRMAP3XKiK_6FBJb-rVQrBX2CSbTuw@mail.gmail.com>
On 31/01/2018 15:54, Jim Mattson wrote:
> You seem to be making the assumption that there is one L2. What if
> there are 100 L2s, and only one has write-access to IA32_SPEC_CTRL? Or
> what if there once was such an L2, but it's been gone for months? The
> current mechanism penalizes *all* L2s if any L2, ever, has
> write-access to IA32_SPEC_CTRL.
Yes, but how would moving the field into struct loaded_vmcs do anything?
Only vmon/vmoff would change anything in vmx->nested.vmcs02.
Even then, L1 vmexits will also be penalized because L1 has probably
done an RDMSR/WRMSR on L2->L1 vmexit. So I don't think it's an issue?
Paolo
next prev parent reply other threads:[~2018-01-31 21:00 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-31 19:37 [PATCH v5 0/5] KVM: Expose speculation control feature to guests KarimAllah Ahmed
2018-01-31 19:37 ` [PATCH v5 1/5] KVM: x86: Update the reverse_cpuid list to include CPUID_7_EDX KarimAllah Ahmed
2018-01-31 20:22 ` Konrad Rzeszutek Wilk
2018-01-31 19:37 ` [PATCH v5 2/5] KVM: x86: Add IBPB support KarimAllah Ahmed
2018-01-31 19:45 ` Jim Mattson
2018-01-31 19:53 ` David Woodhouse
2018-01-31 19:55 ` Jim Mattson
2018-02-01 0:27 ` KarimAllah Ahmed
2018-01-31 20:28 ` Konrad Rzeszutek Wilk
2018-01-31 20:36 ` KarimAllah Ahmed
2018-02-01 4:54 ` Tom Lendacky
2018-02-01 17:00 ` Raj, Ashok
2018-01-31 19:37 ` [PATCH v5 3/5] KVM: VMX: Emulate MSR_IA32_ARCH_CAPABILITIES KarimAllah Ahmed
2018-01-31 19:37 ` [PATCH v5 4/5] KVM: VMX: Allow direct access to MSR_IA32_SPEC_CTRL KarimAllah Ahmed
2018-01-31 19:53 ` Jim Mattson
2018-01-31 20:00 ` David Woodhouse
2018-01-31 20:01 ` KarimAllah Ahmed
2018-01-31 20:18 ` Jim Mattson
2018-01-31 20:21 ` David Woodhouse
2018-01-31 21:18 ` Jim Mattson
2018-01-31 22:05 ` David Woodhouse
2018-01-31 20:34 ` Paolo Bonzini
2018-01-31 20:54 ` Jim Mattson
2018-01-31 21:00 ` Paolo Bonzini [this message]
2018-01-31 21:05 ` Jim Mattson
2018-01-31 21:17 ` Woodhouse, David
2018-01-31 21:42 ` Paolo Bonzini
2018-01-31 21:53 ` Jim Mattson
2018-01-31 21:59 ` Paolo Bonzini
2018-01-31 21:59 ` David Woodhouse
2018-01-31 22:06 ` Jim Mattson
2018-01-31 22:10 ` David Woodhouse
2018-01-31 22:21 ` Linus Torvalds
2018-01-31 22:53 ` Andy Lutomirski
2018-02-01 14:09 ` Paolo Bonzini
2018-01-31 22:52 ` KarimAllah Ahmed
2018-02-01 0:24 ` KarimAllah Ahmed
2018-02-01 4:26 ` Konrad Rzeszutek Wilk
2018-02-01 13:25 ` David Woodhouse
2018-02-01 17:37 ` KarimAllah Ahmed
2018-02-01 17:46 ` KarimAllah Ahmed
2018-02-01 14:19 ` Konrad Rzeszutek Wilk
2018-02-01 14:28 ` KarimAllah Ahmed
2018-01-31 22:56 ` Raj, Ashok
2018-01-31 19:37 ` [PATCH v5 5/5] KVM: SVM: " KarimAllah Ahmed
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