From: patchwork-bot+linux-riscv@kernel.org
To: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
kvm-riscv@lists.infradead.org, kvm@vger.kernel.org,
greentime.hu@sifive.com, vincent.chen@sifive.com,
anup@brainfault.org, atishp@atishpatra.org,
paul.walmsley@sifive.com, palmer@dabbelt.com,
aou@eecs.berkeley.edu
Subject: Re: [PATCH v2 1/1] RISC-V: KVM: Fix APLIC in_clrip and clripnum write emulation
Date: Wed, 11 Dec 2024 22:32:35 +0000 [thread overview]
Message-ID: <173395635599.1729195.3021974708700896861.git-patchwork-notify@kernel.org> (raw)
In-Reply-To: <20241029085542.30541-1-yongxuan.wang@sifive.com>
Hello:
This patch was applied to riscv/linux.git (fixes)
by Anup Patel <anup@brainfault.org>:
On Tue, 29 Oct 2024 16:55:39 +0800 you wrote:
> In the section "4.7 Precise effects on interrupt-pending bits"
> of the RISC-V AIA specification defines that:
>
> "If the source mode is Level1 or Level0 and the interrupt domain
> is configured in MSI delivery mode (domaincfg.DM = 1):
> The pending bit is cleared whenever the rectified input value is
> low, when the interrupt is forwarded by MSI, or by a relevant
> write to an in_clrip register or to clripnum."
>
> [...]
Here is the summary with links:
- [v2,1/1] RISC-V: KVM: Fix APLIC in_clrip and clripnum write emulation
https://git.kernel.org/riscv/c/60821fb4dd73
You are awesome, thank you!
--
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prev parent reply other threads:[~2024-12-11 22:32 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-29 8:55 [PATCH v2 1/1] RISC-V: KVM: Fix APLIC in_clrip and clripnum write emulation Yong-Xuan Wang
2024-11-05 5:11 ` Anup Patel
2024-12-11 22:32 ` patchwork-bot+linux-riscv [this message]
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