Re: [RFC PATCH 1/5] x86/cpufeatures: Add SNP Secure TSC

["Nikunj A. Dadhania" <nikunj@amd.com>]

On 8/29/2024 6:52 PM, Borislav Petkov wrote:
> On Thu, Aug 29, 2024 at 11:07:44AM +0530, Nikunj A Dadhania wrote:
>> The Secure TSC feature for SEV-SNP allows guests to securely use the RDTSC
>> and RDTSCP instructions, ensuring that the parameters used cannot be
>> altered by the hypervisor once the guest is launched. More details in the
>> AMD64 APM Vol 2, Section "Secure TSC".
>>
>> Signed-off-by: Nikunj A Dadhania <nikunj@amd.com>
>> ---
>>  arch/x86/include/asm/cpufeatures.h | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
>> index dd4682857c12..ed61549e8a11 100644
>> --- a/arch/x86/include/asm/cpufeatures.h
>> +++ b/arch/x86/include/asm/cpufeatures.h
>> @@ -444,6 +444,7 @@
>>  #define X86_FEATURE_VM_PAGE_FLUSH	(19*32+ 2) /* VM Page Flush MSR is supported */
>>  #define X86_FEATURE_SEV_ES		(19*32+ 3) /* "sev_es" AMD Secure Encrypted Virtualization - Encrypted State */
>>  #define X86_FEATURE_SEV_SNP		(19*32+ 4) /* "sev_snp" AMD Secure Encrypted Virtualization - Secure Nested Paging */
>> +#define X86_FEATURE_SNP_SECURE_TSC	(19*32+ 8) /* "" AMD SEV-SNP Secure TSC */
> 
> There's a newline here on purpose - keep it.

Sure

> Also, you don't need "" anymore.

Ok, do we need to add an entry to tools/arch/x86/kcpuid/cpuid.csv ?

Regards
Nikunj