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Tsirkin" , Marcel Apfelbaum , Igor Mammedov , Ani Sinha , =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , Yanan Wang , Cornelia Huck , =?UTF-8?Q?Daniel_P=2E_Berrang=C3=A9?= , Eric Blake , Markus Armbruster , Marcelo Tosatti , rick.p.edgecombe@intel.com, kvm@vger.kernel.org, qemu-devel@nongnu.org References: <20241105062408.3533704-1-xiaoyao.li@intel.com> <20241105062408.3533704-37-xiaoyao.li@intel.com> Content-Language: en-US From: Xiaoyao Li In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 12/13/2024 6:17 AM, Ira Weiny wrote: > On Tue, Nov 05, 2024 at 01:23:44AM -0500, Xiaoyao Li wrote: >> TDX uses CPUID 0x1f to configure TD guest's CPU topology. So set >> enable_cpuid_0x1f for TDs. > > If you squashed this into patch 35 I think it might make more sense overall > after some commit message clean ups. I see it as patch 35 introduces the interface, and this patch uses it. I'm neutral. Squash is simple, I would leave it to Paolo to make the final decision. > Ira > >> >> Signed-off-by: Xiaoyao Li >> --- >> target/i386/kvm/tdx.c | 4 ++++ >> 1 file changed, 4 insertions(+) >> >> diff --git a/target/i386/kvm/tdx.c b/target/i386/kvm/tdx.c >> index 289722a129ce..19ce90df4143 100644 >> --- a/target/i386/kvm/tdx.c >> +++ b/target/i386/kvm/tdx.c >> @@ -388,7 +388,11 @@ static int tdx_kvm_type(X86ConfidentialGuest *cg) >> >> static void tdx_cpu_instance_init(X86ConfidentialGuest *cg, CPUState *cpu) >> { >> + X86CPU *x86cpu = X86_CPU(cpu); >> + >> object_property_set_bool(OBJECT(cpu), "pmu", false, &error_abort); >> + >> + x86cpu->enable_cpuid_0x1f = true; >> } >> >> static void tdx_cpu_realizefn(X86ConfidentialGuest *cg, CPUState *cs, >> -- >> 2.34.1 >>