* [PATCH] Fix possible FPU information on SVM
@ 2007-06-07 14:01 Joerg Roedel
[not found] ` <20070607140145.GD24291-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 5+ messages in thread
From: Joerg Roedel @ 2007-06-07 14:01 UTC (permalink / raw)
To: Avi Kivity; +Cc: kvm-devel
[-- Attachment #1: Type: text/plain, Size: 892 bytes --]
From: Joerg Roedel <joerg.roedel-5C7GfCeVMHo@public.gmane.org>
On AMD K8 processors the fxsave/fxrstor instructions do not save and
restore the x87 error pointers FIP/FOP and FDP except the ES bit in the
status word is set. This could lead to information leakage from host to
guest and vice versa. This patch fixes this by setting the error
pointers to defined values on FPU state switch in KVM.
Signed-off-by: Joerg Roedel <joerg.roedel-5C7GfCeVMHo@public.gmane.org>
--
| AMD Saxony Limited Liability Company & Co. KG
Operating | Wilschdorfer Landstr. 101, 01109 Dresden, Germany
System | Register Court Dresden: HRA 4896
Research | General Partner authorized to represent:
Center | AMD Saxony LLC (Wilmington, Delaware, US)
| General Manager of AMD Saxony LLC: Dr. Hans-R. Deppe, Thomas McCoy
[-- Attachment #2: kvm-fpu.patch --]
[-- Type: text/plain, Size: 1063 bytes --]
diff --git a/drivers/kvm/svm.c b/drivers/kvm/svm.c
index ed33f59..f2d5ab0 100644
--- a/drivers/kvm/svm.c
+++ b/drivers/kvm/svm.c
@@ -1474,6 +1474,18 @@ static void load_db_regs(unsigned long *db_regs)
asm volatile ("mov %0, %%dr3" : : "r"(db_regs[3]));
}
+/* pass data that is likly in L1 here */
+static inline void fx_clear_error_pointers(void *data)
+{
+ /*
+ * AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception is
+ * pending. So this function is used to set these registers to defined
+ * values.
+ */
+ asm volatile ("emms\n"
+ "fildl %[addr]\n" :: [addr] "m" (data));
+}
+
static int svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
{
u16 fs_selector;
@@ -1510,6 +1522,7 @@ again:
if (vcpu->fpu_active) {
fx_save(vcpu->host_fx_image);
+ fx_clear_error_pointers(vcpu->svm->vmcb);
fx_restore(vcpu->guest_fx_image);
}
@@ -1624,6 +1637,7 @@ again:
if (vcpu->fpu_active) {
fx_save(vcpu->guest_fx_image);
+ fx_clear_error_pointers(vcpu->svm->vmcb);
fx_restore(vcpu->host_fx_image);
}
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^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] Fix possible FPU information on SVM
[not found] ` <20070607140145.GD24291-5C7GfCeVMHo@public.gmane.org>
@ 2007-06-07 14:08 ` Avi Kivity
[not found] ` <46681170.2080700-atKUWr5tajBWk0Htik3J/w@public.gmane.org>
0 siblings, 1 reply; 5+ messages in thread
From: Avi Kivity @ 2007-06-07 14:08 UTC (permalink / raw)
To: Joerg Roedel; +Cc: kvm-devel
Joerg Roedel wrote:
> From: Joerg Roedel <joerg.roedel-5C7GfCeVMHo@public.gmane.org>
>
> On AMD K8 processors the fxsave/fxrstor instructions do not save and
> restore the x87 error pointers FIP/FOP and FDP except the ES bit in the
> status word is set. This could lead to information leakage from host to
> guest and vice versa. This patch fixes this by setting the error
> pointers to defined values on FPU state switch in KVM.
>
>
The host already has full access to the guest fpu state, so there's no
gain in clearing the error pointers after the guest exit. Am I right in
assuming that the error data itself cannot cause any problems?
The first bit (before guest entry) is needed, though I have a hard time
seeing what a guest could to with the error pointers.
--
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] Fix possible FPU information on SVM
[not found] ` <46681170.2080700-atKUWr5tajBWk0Htik3J/w@public.gmane.org>
@ 2007-06-07 14:42 ` Joerg Roedel
[not found] ` <20070607144251.GF24291-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 5+ messages in thread
From: Joerg Roedel @ 2007-06-07 14:42 UTC (permalink / raw)
To: Avi Kivity; +Cc: kvm-devel
On Thu, Jun 07, 2007 at 05:08:48PM +0300, Avi Kivity wrote:
> Joerg Roedel wrote:
> >From: Joerg Roedel <joerg.roedel-5C7GfCeVMHo@public.gmane.org>
> >
> >On AMD K8 processors the fxsave/fxrstor instructions do not save and
> >restore the x87 error pointers FIP/FOP and FDP except the ES bit in the
> >status word is set. This could lead to information leakage from host to
> >guest and vice versa. This patch fixes this by setting the error
> >pointers to defined values on FPU state switch in KVM.
> >
> >
>
> The host already has full access to the guest fpu state, so there's no gain in clearing the
> error pointers after the guest exit. Am I right in assuming that the error data itself
> cannot cause any problems?
These error pointers could be read from the host userspace which has
normally no access to the guest FPU state. So I think they should also
be cleared at guest exit.
> The first bit (before guest entry) is needed, though I have a hard time seeing what a guest
> could to with the error pointers.
Yes, there are only theoretical attacks for this problem AFAIK. In
theory its possible to track the execution path of an application using
the FPU. But the Linux kernel does the same on FPU context switch
between processes, so it should also be done at the KVM guest/host
switch.
--
| AMD Saxony Limited Liability Company & Co. KG
Operating | Wilschdorfer Landstr. 101, 01109 Dresden, Germany
System | Register Court Dresden: HRA 4896
Research | General Partner authorized to represent:
Center | AMD Saxony LLC (Wilmington, Delaware, US)
| General Manager of AMD Saxony LLC: Dr. Hans-R. Deppe, Thomas McCoy
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] Fix possible FPU information on SVM
[not found] ` <20070607144251.GF24291-5C7GfCeVMHo@public.gmane.org>
@ 2007-06-07 14:51 ` Avi Kivity
[not found] ` <46681B75.6020709-atKUWr5tajBWk0Htik3J/w@public.gmane.org>
0 siblings, 1 reply; 5+ messages in thread
From: Avi Kivity @ 2007-06-07 14:51 UTC (permalink / raw)
To: Joerg Roedel; +Cc: kvm-devel
Joerg Roedel wrote:
> On Thu, Jun 07, 2007 at 05:08:48PM +0300, Avi Kivity wrote:
>
>> Joerg Roedel wrote:
>>
>>> From: Joerg Roedel <joerg.roedel-5C7GfCeVMHo@public.gmane.org>
>>>
>>> On AMD K8 processors the fxsave/fxrstor instructions do not save and
>>> restore the x87 error pointers FIP/FOP and FDP except the ES bit in the
>>> status word is set. This could lead to information leakage from host to
>>> guest and vice versa. This patch fixes this by setting the error
>>> pointers to defined values on FPU state switch in KVM.
>>>
>>>
>>>
>> The host already has full access to the guest fpu state, so there's no gain in clearing the
>> error pointers after the guest exit. Am I right in assuming that the error data itself
>> cannot cause any problems?
>>
>
> These error pointers could be read from the host userspace which has
> normally no access to the guest FPU state. So I think they should also
> be cleared at guest exit.
>
>
Host userspace has access through the ioctl that gets the fpu state (as
well as full access to memory and registers).
>> The first bit (before guest entry) is needed, though I have a hard time seeing what a guest
>> could to with the error pointers.
>>
>
> Yes, there are only theoretical attacks for this problem AFAIK. In
> theory its possible to track the execution path of an application using
> the FPU. But the Linux kernel does the same on FPU context switch
> between processes, so it should also be done at the KVM guest/host
> switch
Agreed.
--
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] Fix possible FPU information on SVM
[not found] ` <46681B75.6020709-atKUWr5tajBWk0Htik3J/w@public.gmane.org>
@ 2007-06-07 17:22 ` Joerg Roedel
0 siblings, 0 replies; 5+ messages in thread
From: Joerg Roedel @ 2007-06-07 17:22 UTC (permalink / raw)
To: Avi Kivity; +Cc: kvm-devel
On Thu, Jun 07, 2007 at 05:51:33PM +0300, Avi Kivity wrote:
> Joerg Roedel wrote:
> >
> >These error pointers could be read from the host userspace which has
> >normally no access to the guest FPU state. So I think they should also
> >be cleared at guest exit.
> >
> >
>
> Host userspace has access through the ioctl that gets the fpu state
> (as well as full access to memory and registers).
Ok, agreed. I saw the problem with other applications than the QEMU.
But the other application has to execute FPU instructions to read these
pointers and this would trigger the Linux FPU switching code. This would
also clear these registers.
--
| AMD Saxony Limited Liability Company & Co. KG
Operating | Wilschdorfer Landstr. 101, 01109 Dresden, Germany
System | Register Court Dresden: HRA 4896
Research | General Partner authorized to represent:
Center | AMD Saxony LLC (Wilmington, Delaware, US)
| General Manager of AMD Saxony LLC: Dr. Hans-R. Deppe, Thomas McCoy
-------------------------------------------------------------------------
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2007-06-07 14:01 [PATCH] Fix possible FPU information on SVM Joerg Roedel
[not found] ` <20070607140145.GD24291-5C7GfCeVMHo@public.gmane.org>
2007-06-07 14:08 ` Avi Kivity
[not found] ` <46681170.2080700-atKUWr5tajBWk0Htik3J/w@public.gmane.org>
2007-06-07 14:42 ` Joerg Roedel
[not found] ` <20070607144251.GF24291-5C7GfCeVMHo@public.gmane.org>
2007-06-07 14:51 ` Avi Kivity
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2007-06-07 17:22 ` Joerg Roedel
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