From mboxrd@z Thu Jan 1 00:00:00 1970 From: Carlo Marcelo Arenas Belon Subject: [PATCH 3/5] qemu: piix_pci enable ACPI interrupts Date: Wed, 28 Nov 2007 12:24:39 -0600 Message-ID: <20071128182439.GC3757@tapir> References: <20071128180630.GA351@tapir> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: kvm-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org Return-path: Content-Disposition: inline In-Reply-To: <20071128180630.GA351@tapir> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: kvm-devel-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org Errors-To: kvm-devel-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org List-Id: kvm.vger.kernel.org This patch enable ACPI interrupts, by Igor Lvovsky Originally from qemu CVS : cvs -q diff -r1.11 -r1.12 hw/piix_pci.c Signed-off-by: Carlo Marcelo Arenas Belon --- qemu/hw/piix_pci.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/qemu/hw/piix_pci.c b/qemu/hw/piix_pci.c index 8c00f0d..3c04e3a 100644 --- a/qemu/hw/piix_pci.c +++ b/qemu/hw/piix_pci.c @@ -208,6 +208,7 @@ static void piix3_set_irq(qemu_irq *pic, int irq_num, int level) { int i, pic_irq, pic_level; + piix3_dev->config[0x60 + irq_num] &= ~0x80; // enable bit pci_irq_levels[irq_num] = level; /* now we change the pic irq level according to the piix irq mappings */ -- 1.5.2.5 ------------------------------------------------------------------------- SF.Net email is sponsored by: The Future of Linux Business White Paper from Novell. From the desktop to the data center, Linux is going mainstream. Let it simplify your IT future. http://altfarm.mediaplex.com/ad/ck/8857-50307-18918-4