[PATCH] report revision 3 of the ACPI/SMBus PIIX4 controller

[PATCH] report revision 3 of the ACPI/SMBus PIIX4 controller

[Marcelo Tosatti]

The PIIX4 ACPI controller prior to revision 0x3 contains a bug where
reading of the timer port is unreliable, so the kernel reads it three
times for consistency check.

QEMU does not suffer from that problem :)

The datasheet for PIIX4, PIIX4E, and PIIX4M is the same. I failed to
find any indication that the revision increase could affect anything
other than the PMTimer port read.

This reduces idle guest CPU consumption from 14% to 8% on 4-way KVM
guest.

--- kvm-userspace.orig/qemu/hw/acpi.c
+++ kvm-userspace/qemu/hw/acpi.c
@@ -486,7 +486,7 @@ i2c_bus *piix4_pm_init(PCIBus *bus, int
     pci_conf[0x03] = 0x71;
     pci_conf[0x06] = 0x80;
     pci_conf[0x07] = 0x02;
-    pci_conf[0x08] = 0x00; // revision number
+    pci_conf[0x08] = 0x03; // revision number
     pci_conf[0x09] = 0x00;
     pci_conf[0x0a] = 0x80; // other bridge device
     pci_conf[0x0b] = 0x06; // bridge device


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Re: [PATCH] report revision 3 of the ACPI/SMBus PIIX4 controller

[Avi Kivity]

Marcelo Tosatti wrote:
> The PIIX4 ACPI controller prior to revision 0x3 contains a bug where
> reading of the timer port is unreliable, so the kernel reads it three
> times for consistency check.
>
> QEMU does not suffer from that problem :)
>
> The datasheet for PIIX4, PIIX4E, and PIIX4M is the same. I failed to
> find any indication that the revision increase could affect anything
> other than the PMTimer port read.
>
> This reduces idle guest CPU consumption from 14% to 8% on 4-way KVM
> guest.
>
>   

Applied (to kvm's qemu), thanks.

-- 
error compiling committee.c: too many arguments to function


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Re: [PATCH] report revision 3 of the ACPI/SMBus PIIX4 controller

[Anders]

Marcelo Tosatti <marcelo-Bw31MaZKKs3YtjvyW6yDsg@public.gmane.org> writes:

> This reduces idle guest CPU consumption from 14% to 8% on 4-way KVM
> guest.

How do you get that high consumption? What combination of clocks/hz on
host/guest are you using?

I am cursious, since my idle KVM process is at less than 1%.


Regards,
Anders.

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Re: [PATCH] report revision 3 of the ACPI/SMBus PIIX4 controller

[Marcelo Tosatti]

On Sun, Jan 13, 2008 at 12:19:20PM +0100, Anders wrote:
> Marcelo Tosatti <marcelo-Bw31MaZKKs3YtjvyW6yDsg@public.gmane.org> writes:
> 
> > This reduces idle guest CPU consumption from 14% to 8% on 4-way KVM
> > guest.
> 
> How do you get that high consumption? What combination of clocks/hz on
> host/guest are you using?

CONFIG_HZ=250

4-way SMP guest, 8-way Intel host (without the VMX TSC sync patch posted
previously).

> I am cursious, since my idle KVM process is at less than 1%.

You have an UP guest right?

The problem is that the TSC synchronization check on boot is
only performed on SMP guests. Intel hosts usually have their TSC
synchronized, whereas AMD ones don't, so they fall back to use the ACPI
PM timer (until the HPET QEMU/KVM support is in place).

UP guests use TSC as a clocksource by default, and TSC reads won't cause
a VMExit.


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Re: [PATCH] report revision 3 of the ACPI/SMBus PIIX4 controller

[Anders]

Marcelo Tosatti <marcelo-Bw31MaZKKs3YtjvyW6yDsg@public.gmane.org> writes:

> On Sun, Jan 13, 2008 at 12:19:20PM +0100, Anders wrote:

[...]

>> How do you get that high consumption? What combination of clocks/hz on
>> host/guest are you using?
>
> CONFIG_HZ=250

Okay, with nohz=off (in the guest) I also see some higher load. I
didn't try the patch, though.

> UP guests use TSC as a clocksource by default, and TSC reads won't
> cause a VMExit.

So for the lightest load (power saving), I should use UP and TSC?


Thanks,
  Anders.

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Re: [PATCH] report revision 3 of the ACPI/SMBus PIIX4 controller

[Marcelo Tosatti]

On Sun, Jan 13, 2008 at 04:49:27PM +0100, Anders wrote:
> Marcelo Tosatti <marcelo-Bw31MaZKKs3YtjvyW6yDsg@public.gmane.org> writes:
> 
> > On Sun, Jan 13, 2008 at 12:19:20PM +0100, Anders wrote:
> 
> [...]
> 
> >> How do you get that high consumption? What combination of clocks/hz on
> >> host/guest are you using?
> >
> > CONFIG_HZ=250
> 
> Okay, with nohz=off (in the guest) I also see some higher load. I
> didn't try the patch, though.
> 
> > UP guests use TSC as a clocksource by default, and TSC reads won't
> > cause a VMExit.
> 
> So for the lightest load (power saving), I should use UP and TSC?

Yes.

As you note NOHZ also helps dramatically.


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