From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Joerg Roedel" Subject: Re: [PATCH 2/2] X86: allow access to EFER in 32bit KVM Date: Wed, 30 Jan 2008 19:18:05 +0100 Message-ID: <20080130181805.GR6960@amd.com> References: <1201697269-8705-1-git-send-email-joerg.roedel@amd.com> <1201697269-8705-3-git-send-email-joerg.roedel@amd.com> <47A07788.9050604@qumranet.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: kvm-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org To: "Avi Kivity" Return-path: In-Reply-To: <47A07788.9050604-atKUWr5tajBWk0Htik3J/w@public.gmane.org> Content-Disposition: inline List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: kvm-devel-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org Errors-To: kvm-devel-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org List-Id: kvm.vger.kernel.org On Wed, Jan 30, 2008 at 03:11:36PM +0200, Avi Kivity wrote: > Joerg Roedel wrote: > >This patch makes the EFER register accessible on a 32bit KVM host. This is > >necessary to boot 32 bit PAE guests under SVM. > > > > > > > > static void set_efer(struct kvm_vcpu *vcpu, u64 efer) > > { > > if (efer & EFER_RESERVED_BITS) { > >@@ -432,12 +430,19 @@ static void set_efer(struct kvm_vcpu *vcpu, u64 efer) > > return; > > } > > +#ifdef CONFIG_X86_64 > > if (is_paging(vcpu) > > && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) { > > printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n"); > > kvm_inject_gp(vcpu, 0); > > return; > > } > >+#else > >+ if (efer & EFER_LME) { > >+ printk(KERN_DEBUG "set_efer: #GP, enable longmode on 32bit host\n"); > >+ kvm_inject_gp(vcpu, 0); > >+ } > >+#endif > > > > We should, in addition, check the various EFER bits against host cpu capabilities (with cpu_has()). This > will ensure that any attempt to set an invalid bit will fail. On Intel cpus that don't have EFER, there are > no valid bits, and if we detect that in vmx_set_efer, we can make it work on hosts that don't have EFER. Ok, makes sense. I will update the patches. Joerg -- | AMD Saxony Limited Liability Company & Co. KG Operating | Wilschdorfer Landstr. 101, 01109 Dresden, Germany System | Register Court Dresden: HRA 4896 Research | General Partner authorized to represent: Center | AMD Saxony LLC (Wilmington, Delaware, US) | General Manager of AMD Saxony LLC: Dr. Hans-R. Deppe, Thomas McCoy ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/