From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Yang, Sheng" Subject: [RFC][PATCH 3/7] KVM: MMU: Add Two Level Paging (TLP) Date: Fri, 1 Feb 2008 16:23:00 +0800 Message-ID: <200802011623.01171.sheng.yang@intel.com> Mime-Version: 1.0 Content-Type: Multipart/Mixed; boundary="Boundary-00=_lbtoHObqWNhy7zr" Cc: kvm-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org To: Avi Kivity Return-path: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: kvm-devel-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org Errors-To: kvm-devel-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org List-Id: kvm.vger.kernel.org --Boundary-00=_lbtoHObqWNhy7zr Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline =46rom 22895ad4778189242dd546c98709bcd3fadb0cf6 Mon Sep 17 00:00:00 2001 =46rom: Sheng Yang Date: Fri, 1 Feb 2008 06:32:19 +0800 Subject: [PATCH] KVM: MMU: Add Two Level Paging (TLP) =46or EPT's path is very different from NPT's, the return value of the func= tion tlp_enable() indicate if EPT exists, then set up proper path. Signed-off-by: Sheng Yang =2D-- arch/x86/kvm/mmu.c | 71 ++++++++++++++++++++++++++++++++++++++++++++++++= ++- 1 files changed, 69 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index 635e70c..14de6d0 100644 =2D-- a/arch/x86/kvm/mmu.c +++ b/arch/x86/kvm/mmu.c @@ -1188,6 +1188,55 @@ static void paging_free(struct kvm_vcpu *vcpu) #include "paging_tmpl.h" #undef PTTYPE +static int ept_paging_page_fault(struct kvm_vcpu *vcpu, gva_t gva, + u32 error_code) +{ + /* No paging fault for EPT */ + BUG(); + return -1; +} + +static void ept_paging_free(struct kvm_vcpu *vcpu) +{ + vcpu->arch.mmu.root_hpa =3D INVALID_PAGE; +} + +static void ept_paging_prefetch_page(struct kvm_vcpu *vcpu, + struct kvm_mmu_page *sp) +{ + BUG(); +} + +static int init_kvm_tlp_mmu(struct kvm_vcpu *vcpu) +{ + struct kvm_mmu *context =3D &vcpu->arch.mmu; + + context->new_cr3 =3D nonpaging_new_cr3; + context->shadow_root_level =3D 0; + context->root_hpa =3D INVALID_PAGE; + + if (kvm_x86_ops->tlp_enabled() =3D=3D KVM_TLP_EPT) { + context->page_fault =3D ept_paging_page_fault; + context->free =3D ept_paging_free; + context->prefetch_page =3D ept_paging_prefetch_page; + } + + if (!is_paging(vcpu)) { + context->gva_to_gpa =3D nonpaging_gva_to_gpa; + context->root_level =3D 0; + } else if (is_long_mode(vcpu)) { + context->gva_to_gpa =3D paging64_gva_to_gpa; + context->root_level =3D PT64_ROOT_LEVEL; + } else if (is_pae(vcpu)) { + context->gva_to_gpa =3D paging64_gva_to_gpa; + context->root_level =3D PT32E_ROOT_LEVEL; + } else { + context->gva_to_gpa =3D paging32_gva_to_gpa; + context->root_level =3D PT32_ROOT_LEVEL; + } + return 0; +} + static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level) { struct kvm_mmu *context =3D &vcpu->arch.mmu; @@ -1229,7 +1278,7 @@ static int paging32E_init_context(struct kvm_vcpu *vc= pu) return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL); } =2Dstatic int init_kvm_mmu(struct kvm_vcpu *vcpu) +static int init_kvm_softmmu(struct kvm_vcpu *vcpu) { ASSERT(vcpu); ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); @@ -1244,6 +1293,14 @@ static int init_kvm_mmu(struct kvm_vcpu *vcpu) return paging32_init_context(vcpu); } +static int init_kvm_mmu(struct kvm_vcpu *vcpu) +{ + if (kvm_x86_ops->tlp_enabled()) + return init_kvm_tlp_mmu(vcpu); + else + return init_kvm_softmmu(vcpu); +} + static void destroy_kvm_mmu(struct kvm_vcpu *vcpu) { ASSERT(vcpu); @@ -1264,6 +1321,15 @@ int kvm_mmu_load(struct kvm_vcpu *vcpu) { int r; + if (kvm_x86_ops->tlp_enabled() =3D=3D KVM_TLP_EPT) { + if (!is_paging(vcpu)) + vcpu->arch.mmu.root_hpa =3D + VMX_EPT_IDENTITY_PAGETABLE_ADDR; + else + vcpu->arch.mmu.root_hpa =3D vcpu->arch.cr3; + kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa); + return 0; + } r =3D mmu_topup_memory_caches(vcpu); if (r) goto out; @@ -1280,7 +1346,8 @@ EXPORT_SYMBOL_GPL(kvm_mmu_load); void kvm_mmu_unload(struct kvm_vcpu *vcpu) { =2D mmu_free_roots(vcpu); + if (kvm_x86_ops->tlp_enabled() !=3D KVM_TLP_EPT) + mmu_free_roots(vcpu); } static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu, =2D- debian.1.5.3.7.1-dirty --Boundary-00=_lbtoHObqWNhy7zr Content-Type: text/x-diff; charset="utf-8"; name="0003-KVM-MMU-Add-Two-Level-Paging-TLP.patch" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="0003-KVM-MMU-Add-Two-Level-Paging-TLP.patch" =46rom 22895ad4778189242dd546c98709bcd3fadb0cf6 Mon Sep 17 00:00:00 2001 =46rom: Sheng Yang Date: Fri, 1 Feb 2008 06:32:19 +0800 Subject: [PATCH] KVM: MMU: Add Two Level Paging (TLP) =46or EPT's path is very different from NPT's, the return value of the func= tion tlp_enable() indicate if EPT exists, then set up proper path. Signed-off-by: Sheng Yang =2D-- arch/x86/kvm/mmu.c | 71 ++++++++++++++++++++++++++++++++++++++++++++++++= ++- 1 files changed, 69 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index 635e70c..14de6d0 100644 =2D-- a/arch/x86/kvm/mmu.c +++ b/arch/x86/kvm/mmu.c @@ -1188,6 +1188,55 @@ static void paging_free(struct kvm_vcpu *vcpu) #include "paging_tmpl.h" #undef PTTYPE =20 +static int ept_paging_page_fault(struct kvm_vcpu *vcpu, gva_t gva, + u32 error_code) +{ + /* No paging fault for EPT */ + BUG(); + return -1; +} + +static void ept_paging_free(struct kvm_vcpu *vcpu) +{ + vcpu->arch.mmu.root_hpa =3D INVALID_PAGE; +} + +static void ept_paging_prefetch_page(struct kvm_vcpu *vcpu, + struct kvm_mmu_page *sp) +{ + BUG(); +} + +static int init_kvm_tlp_mmu(struct kvm_vcpu *vcpu) +{ + struct kvm_mmu *context =3D &vcpu->arch.mmu; + + context->new_cr3 =3D nonpaging_new_cr3; + context->shadow_root_level =3D 0; + context->root_hpa =3D INVALID_PAGE; + + if (kvm_x86_ops->tlp_enabled() =3D=3D KVM_TLP_EPT) { + context->page_fault =3D ept_paging_page_fault; + context->free =3D ept_paging_free; + context->prefetch_page =3D ept_paging_prefetch_page; + } + + if (!is_paging(vcpu)) { + context->gva_to_gpa =3D nonpaging_gva_to_gpa; + context->root_level =3D 0; + } else if (is_long_mode(vcpu)) { + context->gva_to_gpa =3D paging64_gva_to_gpa; + context->root_level =3D PT64_ROOT_LEVEL; + } else if (is_pae(vcpu)) { + context->gva_to_gpa =3D paging64_gva_to_gpa; + context->root_level =3D PT32E_ROOT_LEVEL; + } else { + context->gva_to_gpa =3D paging32_gva_to_gpa; + context->root_level =3D PT32_ROOT_LEVEL; + } + return 0; +} + static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level) { struct kvm_mmu *context =3D &vcpu->arch.mmu; @@ -1229,7 +1278,7 @@ static int paging32E_init_context(struct kvm_vcpu *vc= pu) return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL); } =20 =2Dstatic int init_kvm_mmu(struct kvm_vcpu *vcpu) +static int init_kvm_softmmu(struct kvm_vcpu *vcpu) { ASSERT(vcpu); ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); @@ -1244,6 +1293,14 @@ static int init_kvm_mmu(struct kvm_vcpu *vcpu) return paging32_init_context(vcpu); } =20 +static int init_kvm_mmu(struct kvm_vcpu *vcpu) +{ + if (kvm_x86_ops->tlp_enabled()) + return init_kvm_tlp_mmu(vcpu); + else + return init_kvm_softmmu(vcpu); +} + static void destroy_kvm_mmu(struct kvm_vcpu *vcpu) { ASSERT(vcpu); @@ -1264,6 +1321,15 @@ int kvm_mmu_load(struct kvm_vcpu *vcpu) { int r; =20 + if (kvm_x86_ops->tlp_enabled() =3D=3D KVM_TLP_EPT) { + if (!is_paging(vcpu)) + vcpu->arch.mmu.root_hpa =3D + VMX_EPT_IDENTITY_PAGETABLE_ADDR; + else + vcpu->arch.mmu.root_hpa =3D vcpu->arch.cr3; + kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa); + return 0; + } r =3D mmu_topup_memory_caches(vcpu); if (r) goto out; @@ -1280,7 +1346,8 @@ EXPORT_SYMBOL_GPL(kvm_mmu_load); =20 void kvm_mmu_unload(struct kvm_vcpu *vcpu) { =2D mmu_free_roots(vcpu); + if (kvm_x86_ops->tlp_enabled() !=3D KVM_TLP_EPT) + mmu_free_roots(vcpu); } =20 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu, =2D-=20 debian.1.5.3.7.1-dirty --Boundary-00=_lbtoHObqWNhy7zr Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. 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