[patch 05/13] QEMU: add a mutex to protect IRQ chip data structures

[Marcelo Tosatti <mtosatti@redhat.com>]

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Subject says it all. 

With KVM in-kernel irqchip this is unused.

Index: kvm-userspace.io/qemu/hw/apic.c
===================================================================
--- kvm-userspace.io.orig/qemu/hw/apic.c
+++ kvm-userspace.io/qemu/hw/apic.c
@@ -478,6 +478,8 @@ int apic_get_interrupt(CPUState *env)
     APICState *s = env->apic_state;
     int intno;
 
+    assert_is_locked(&irq_mutex);
+
     /* if the APIC is installed or enabled, we let the 8259 handle the
        IRQs */
     if (!s)
@@ -597,6 +599,8 @@ static uint32_t apic_mem_readl(void *opa
         return 0;
     s = env->apic_state;
 
+    qemu_mutex_lock(&irq_mutex);
+
     index = (addr >> 4) & 0xff;
     switch(index) {
     case 0x02: /* id */
@@ -659,6 +663,7 @@ static uint32_t apic_mem_readl(void *opa
         val = 0;
         break;
     }
+    qemu_mutex_unlock(&irq_mutex);
 #ifdef DEBUG_APIC
     printf("APIC read: %08x = %08x\n", (uint32_t)addr, val);
 #endif
@@ -676,6 +681,8 @@ static void apic_mem_writel(void *opaque
         return;
     s = env->apic_state;
 
+    qemu_mutex_lock(&irq_mutex);
+
 #ifdef DEBUG_APIC
     printf("APIC write: %08x = %08x\n", (uint32_t)addr, val);
 #endif
@@ -748,6 +755,8 @@ static void apic_mem_writel(void *opaque
         s->esr |= ESR_ILLEGAL_ADDRESS;
         break;
     }
+
+    qemu_mutex_unlock(&irq_mutex);
 }
 
 #ifdef KVM_CAP_IRQCHIP
@@ -995,6 +1004,8 @@ static void ioapic_service(IOAPICState *
     uint8_t polarity;
     uint32_t deliver_bitmask[MAX_APIC_WORDS];
 
+    assert_is_locked(&irq_mutex);
+
     for (i = 0; i < IOAPIC_NUM_PINS; i++) {
         mask = 1 << i;
         if (s->irr & mask) {
@@ -1087,9 +1098,12 @@ static void ioapic_mem_writel(void *opaq
     IOAPICState *s = opaque;
     int index;
 
+    qemu_mutex_lock(&irq_mutex);
+
     addr &= 0xff;
     if (addr == 0x00)  {
         s->ioregsel = val;
+        qemu_mutex_unlock(&irq_mutex);
         return;
     } else if (addr == 0x10) {
 #ifdef DEBUG_IOAPIC
@@ -1113,6 +1127,7 @@ static void ioapic_mem_writel(void *opaq
                         s->ioredtbl[index] |= val;
                     }
                     ioapic_service(s);
+                    qemu_mutex_unlock(&irq_mutex);
                 }
         }
     }
Index: kvm-userspace.io/qemu/hw/i8259.c
===================================================================
--- kvm-userspace.io.orig/qemu/hw/i8259.c
+++ kvm-userspace.io/qemu/hw/i8259.c
@@ -78,6 +78,7 @@ static uint64_t irq_count[16];
 static inline void pic_set_irq1(PicState *s, int irq, int level)
 {
     int mask;
+    assert_is_locked(&irq_mutex);
     mask = 1 << irq;
     if (s->elcr & mask) {
         /* level triggered */
@@ -118,6 +119,8 @@ static int pic_get_irq(PicState *s)
 {
     int mask, cur_priority, priority;
 
+    assert_is_locked(&irq_mutex);
+
     mask = s->irr & ~s->imr;
     priority = get_priority(s, mask);
     if (priority == 8)
@@ -189,6 +192,7 @@ static void i8259_set_irq(void *opaque, 
 	if (kvm_set_irq(irq, level))
 	    return;
 #endif
+    qemu_mutex_lock(&irq_mutex);
 #if defined(DEBUG_PIC) || defined(DEBUG_IRQ_COUNT)
     if (level != irq_level[irq]) {
 #if defined(DEBUG_PIC)
@@ -211,6 +215,7 @@ static void i8259_set_irq(void *opaque, 
     if (s->alt_irq_func)
         s->alt_irq_func(s->alt_irq_opaque, irq, level);
     pic_update_irq(s);
+    qemu_mutex_unlock(&irq_mutex);
 }
 
 /* acknowledge interrupt 'irq' */
@@ -309,6 +314,7 @@ static void pic_ioport_write(void *opaqu
     PicState *s = opaque;
     int priority, cmd, irq;
 
+    qemu_mutex_lock(&irq_mutex);
 #ifdef DEBUG_PIC
     printf("pic_write: addr=0x%02x val=0x%02x\n", addr, val);
 #endif
@@ -394,6 +400,7 @@ static void pic_ioport_write(void *opaqu
             break;
         }
     }
+    qemu_mutex_unlock(&irq_mutex);
 }
 
 static uint32_t pic_poll_read (PicState *s, uint32_t addr1)
@@ -424,6 +431,7 @@ static uint32_t pic_ioport_read(void *op
     unsigned int addr;
     int ret;
 
+    qemu_mutex_lock(&irq_mutex);
     addr = addr1;
     addr &= 1;
     if (s->poll) {
@@ -439,6 +447,7 @@ static uint32_t pic_ioport_read(void *op
             ret = s->imr;
         }
     }
+    qemu_mutex_unlock(&irq_mutex);
 #ifdef DEBUG_PIC
     printf("pic_read: addr=0x%02x val=0x%02x\n", addr1, ret);
 #endif
@@ -451,11 +460,13 @@ uint32_t pic_intack_read(PicState2 *s)
 {
     int ret;
 
+    qemu_mutex_lock(&irq_mutex);
     ret = pic_poll_read(&s->pics[0], 0x00);
     if (ret == 2)
         ret = pic_poll_read(&s->pics[1], 0x80) + 8;
     /* Prepare for ISR read */
     s->pics[0].read_reg_select = 1;
+    qemu_mutex_unlock(&irq_mutex);
 
     return ret;
 }
Index: kvm-userspace.io/qemu/hw/pc.c
===================================================================
--- kvm-userspace.io.orig/qemu/hw/pc.c
+++ kvm-userspace.io/qemu/hw/pc.c
@@ -53,6 +53,8 @@ static PITState *pit;
 static IOAPICState *ioapic;
 static PCIDevice *i440fx_state;
 
+qemu_mutex_t irq_mutex;
+
 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
 {
 }
@@ -99,24 +101,30 @@ int cpu_get_pic_interrupt(CPUState *env)
 {
     int intno;
 
+    qemu_mutex_lock(&irq_mutex);
     intno = apic_get_interrupt(env);
     if (intno >= 0) {
         /* set irq request if a PIC irq is still pending */
         /* XXX: improve that */
         pic_update_irq(isa_pic);
-        return intno;
+        goto out;
     }
     /* read the irq from the PIC */
-    if (!apic_accept_pic_intr(env))
-        return -1;
+    if (!apic_accept_pic_intr(env)) {
+        intno = -1;
+        goto out;
+    }
 
     intno = pic_read_irq(isa_pic);
+out:
+    qemu_mutex_unlock(&irq_mutex);
     return intno;
 }
 
 static void pic_irq_request(void *opaque, int irq, int level)
 {
     CPUState *env = opaque;
+    assert_is_locked(&irq_mutex);
     if (level && apic_accept_pic_intr(env))
         cpu_interrupt(env, CPU_INTERRUPT_HARD);
 }
@@ -783,6 +791,8 @@ static void pc_init1(ram_addr_t ram_size
     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
     BlockDriverState *fd[MAX_FD];
 
+    qemu_mutex_init(&irq_mutex);
+
     if (ram_size >= 0xe0000000 ) {
         above_4g_mem_size = ram_size - 0xe0000000;
         ram_size = 0xe0000000;
Index: kvm-userspace.io/qemu/hw/pc.h
===================================================================
--- kvm-userspace.io.orig/qemu/hw/pc.h
+++ kvm-userspace.io/qemu/hw/pc.h
@@ -2,6 +2,8 @@
 #define HW_PC_H
 /* PC-style peripherals (also used by other machines).  */
 
+extern qemu_mutex_t irq_mutex;
+
 /* serial.c */
 
 SerialState *serial_init(int base, qemu_irq irq, CharDriverState *chr);

-- 


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