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From: Ryan Harper <ryanh@us.ibm.com>
To: Anthony Liguori <anthony@codemonkey.ws>
Cc: kvm-devel@lists.sourceforge.net, Ryan Harper <ryanh@us.ibm.com>
Subject: Re: pinning, tsc and apic
Date: Tue, 13 May 2008 13:56:53 -0500	[thread overview]
Message-ID: <20080513185653.GA20029@us.ibm.com> (raw)
In-Reply-To: <4828BA49.6060007@codemonkey.ws>

* Anthony Liguori <anthony@codemonkey.ws> [2008-05-12 17:00]:
> Ryan Harper wrote:
> >>BTW, what if you don't pace-out the startups?  Do we still have issues 
> >>with that?
> >>    
> >
> >Do you mean without the 1 second delay or with a longer delay?  My
> >experience is that delay helps (fewer hangs), but doesn't solve things
> >completely.
> >  
> 
> So you see problems when using numactrl to pin and using a 0-second 
> delay?  The short delay may help reduce the number of CPU migrations 
> which would explain your observation.
> 
> If there are problems when doing a 0-second delay and numactl, then 
> perhaps it's not just a cpu-migration issue.

nodelay, w/pinning -> all OK
delay, w/pinning   -> all OK

with -no-kvm-irqchip (with or without any delay (1 to 30 seconds), I get
in some guests:

..MP-BIOS bug: 8254 timer not connected to IO-APIC
Kernel panic - not syncing: IO-APIC + timer doesn't work! Try using the
'noapic' kernel parameter

> >In svm.c, I do think we account for most of that time since the delta
> >calculation will shift the guest time forward to the tsc value read in
> >svm_vcpu_load().  We'll still miss the time between fixing the offset
> >and when the guest can actually read its tsc.
> >  
> 
> Yes, which is the duration that the guest isn't scheduled on any 
> processor and the next time it runs happens to be on a different process.
> 
> >>A possible way to fix this (that's only valid on a processor with a 
> >>fixed-frequency TSC), is to take a high-res timestamp on vcpu_put, and 
> >>then on vcpu_load, take the delta timestamp since the old TSC was saved, 
> >>and use the TSC frequency on the new pcpu to calculate the number of 
> >>elapsed cycles.
> >>
> >>Assuming a fixed frequency TSC, and a calibrated TSC across all 
> >>processors, you could get the same affects by using the VT tsc delta 
> >>logic.  Basically, it always uses the new CPU's TSC unless that would 
> >>cause the guest to move backwards in time.  As long as you have a 
> >>stable, calibrated TSC, this would work out.
> >>
> >>Can you try your old patch that did this and see if it fixes the problem?
> >>    
> >
> >Yeah, I'll give it a spin.

Testing the old patch with no-pinning, but just the tsc check doesn't
help the situation.

-- 
Ryan Harper
Software Engineer; Linux Technology Center
IBM Corp., Austin, Tx
(512) 838-9253   T/L: 678-9253
ryanh@us.ibm.com

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  reply	other threads:[~2008-05-13 18:56 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-05-12 19:19 pinning, tsc and apic Ryan Harper
2008-05-12 19:49 ` Anthony Liguori
2008-05-12 21:23   ` Ryan Harper
2008-05-12 21:44     ` Anthony Liguori
2008-05-13 18:56       ` Ryan Harper [this message]
2008-05-14 23:25 ` Marcelo Tosatti
2008-05-14 23:45   ` Anthony Liguori
2008-05-15  6:59     ` Chris Wright
2008-05-15 14:10       ` Anthony Liguori
2008-05-15 16:26       ` Ryan Harper
2008-06-18 13:12       ` [kvm-devel] " Avi Kivity

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