From mboxrd@z Thu Jan 1 00:00:00 1970 From: "M. Warner Losh" Subject: Re: [Qemu-devel] [PATCH 1/2] QEMU: Mask writes to RO bits in the status reg of PCI config space Date: Mon, 26 May 2008 12:33:56 -0600 (MDT) Message-ID: <20080526.123356.282844786.imp@bsdimp.com> References: <1211798213-4187-1-git-send-email-amit.shah@qumranet.com> <1211798213-4187-2-git-send-email-amit.shah@qumranet.com> <1211798213-4187-3-git-send-email-amit.shah@qumranet.com> Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Cc: kvm@vger.kernel.org To: qemu-devel@nongnu.org, amit.shah@qumranet.com Return-path: Received: from bsdimp.com ([199.45.160.85]:59211 "EHLO harmony.bsdimp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754736AbYEZSkg (ORCPT ); Mon, 26 May 2008 14:40:36 -0400 In-Reply-To: <1211798213-4187-3-git-send-email-amit.shah@qumranet.com> Sender: kvm-owner@vger.kernel.org List-ID: In message: <1211798213-4187-3-git-send-email-amit.shah@qumranet.com> Amit Shah writes: : The Status register in the PCI config space has some read-only bits. : Any writes to those bits should be masked out. subvendor and subproduct aren't necessarily read-only. There are several devices that allow 'special magic' to enable their writing (used by the BIOS). Warner