Re: [RFC]RE: [PATCH] kvm-ia64 irq assignment 1/2 kernel

[Marcelo Tosatti <mtosatti@redhat.com>]

On Wed, Jun 11, 2008 at 07:24:09AM -0700, Alexander Graf wrote:
>
> On Jun 10, 2008, at 12:57 AM, Xu, Anthony wrote:
>
>> Thanks for comments
>>
>> Basically we are on the same page, while I didn't find your patch about
>> irq assignment, can you post it in this thread again, thx?
>
> I'll attach it to this mail.
>
>> Below patch makes all PCI devices use level-trigger , active low
>> interrupt, it worked well when running linux guest, I didn't try windows
>> guest yet.
>> (didn't have windows image in hand)
>>
>> Please comment!
>>
>> If this is acceptabled, we can figure out how to use IOAPIC in kvm/ia32
>> based on this. Which will reduce irq sharing dramatically.
>>
>>
>> Thanks,
>> Anthony
>>
>>
>>
>> diff --git a/bios/acpi-dsdt.dsl b/bios/acpi-dsdt.dsl
>> index 21fc76a..4b5e824 100755
>> --- a/bios/acpi-dsdt.dsl
>> +++ b/bios/acpi-dsdt.dsl
>> @@ -974,7 +974,7 @@ DefinitionBlock (
>>                 Name(_HID, EISAID("PNP0C0F"))     // PCI interrupt link
>>                 Name(_UID, 1)
>>                 Name(_PRS, ResourceTemplate(){
>> -                    Interrupt (, Level, ActiveHigh, Shared)
>> +                    Interrupt (, Level, ActiveLow, Shared)
>
> This looks pretty much correct to me ;-). You might also want to add the 
> GSI functionality I have in my patch. The only thing we have not discussed 
> so far is, how do interrupts get routed when _PIC is not set to 1, aka the 
> "boot case"?

Hi Alexander, Anthony,

I think it would be better to avoid static PCI pin -> IOAPIC pin
assignments, if PCI link devices can be used (allowing the OS to route
IRQ's as it wishes to).

Take a look at http://www.microsoft.com/whdc/archive/acpi-mp.mspx. It
seems cleaner to use "bimodal link nodes" (using the parlance from URL
above) instead of "bimodal _PRT" as your present GSI patch is using.

My current inclination is:

- Move the PCI interrupt link device code to a method in a separate file
  (with arguments such as _UID, IRQ list, etc).
- Create separate PCI interrupt link devices for each PCI pin of each
  slot (see the example table at end of URL).
- Assign all available IRQ's covered by the single IOAPIC (0-24) in the
  interrupt list for these interrupt link devices.

I'll try Anthony's patch with Windows.