Re: [RFC]RE: [PATCH] kvm-ia64 irq assignment 1/2 kernel

Marcelo Tosatti
2008-06-14T22:58:47Z

On Fri, Jun 13, 2008 at 12:15:23AM +0800, Xu, Anthony wrote:
> > I think it would be better to avoid static PCI pin -> IOAPIC pin
> > assignments, if PCI link devices can be used (allowing the OS to route
> > IRQ's as it wishes to).
> Seems PCI link device only support irq-pin < 16,
> IOAPIC pin 16~23 can not be used.
>
>
>
> >
> > Take a look at http://www.microsoft.com/whdc/archive/acpi-mp.mspx. It
> > seems cleaner to use "bimodal link nodes" (using the parlance from URL
> > above) instead of "bimodal _PRT" as your present GSI patch is using.
> Bimodal _PRT is a great idea, I never thought of it before, thanks.
>
> While in PIIX platform there are only 4 PCI link entries, how can we
> introduce more? Where to put these added entries?
> still in ISA bridge configure space.

Would have to write an ACPI-IOAPIC "IRQ router" to replace PIIX. It
would be queried via a SystemIO region, so QEMU can know what IRQ
has been assigned to a particular slot/func (OS can then change IRQ
assignment via link device _SRS method).

That seems to be necessary for dynamic IRQ assignment of slots/function
once you have more than one IOAPIC (note we can also assign one IRQ to
each function inside each slot, currently there's one IRQ per _slot_).

> Another concern is, can this link use irq-pin > 15?
> In the example ASL code in the web page you provided, they use irq-pin
> <=15

Sure it can, as long as the OS has notified its not using PIIX's PIC
(via the _PIC method).