From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Yang, Sheng" Subject: [PATCH] KVM: VMX: Add ept_sync_context in flush_tlb Date: Wed, 18 Jun 2008 11:38:22 +0800 Message-ID: <200806181138.22990.sheng.yang@intel.com> Mime-Version: 1.0 Content-Type: Multipart/Mixed; boundary="Boundary-00=_uMIWI673ackkG6J" To: kvm@vger.kernel.org Return-path: Received: from mga09.intel.com ([134.134.136.24]:38896 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758211AbYFRDic (ORCPT ); Tue, 17 Jun 2008 23:38:32 -0400 Sender: kvm-owner@vger.kernel.org List-ID: --Boundary-00=_uMIWI673ackkG6J Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline =46rom 54dc26e44f1c0aa460bef409b799f36dae56a911 Mon Sep 17 00:00:00 2001 =46rom: Sheng Yang Date: Wed, 18 Jun 2008 11:23:13 +0800 Subject: [PATCH] KVM: VMX: Add ept_sync_context in flush_tlb =46ix a potention issue caused by kvm_mmu_slot_remove_write_access().=20 The old behavior don't sync EPT TLB with modified EPT entry, which=20 result in inconsistent content of EPT TLB and EPT table. Signed-off-by: Sheng Yang =2D-- arch/x86/kvm/vmx.c | 18 ++++++++++++------ 1 files changed, 12 insertions(+), 6 deletions(-) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 6e4278d..5e2a800 100644 =2D-- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -83,6 +83,7 @@ struct vcpu_vmx { } irq; } rmode; int vpid; + u64 eptp; }; static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu) @@ -364,24 +365,24 @@ static inline void ept_sync_global(void) __invept(VMX_EPT_EXTENT_GLOBAL, 0, 0); } =2Dstatic inline void ept_sync_context(u64 eptp) +static inline void ept_sync_context(struct vcpu_vmx *vmx) { if (vm_need_ept()) { if (cpu_has_vmx_invept_context()) =2D __invept(VMX_EPT_EXTENT_CONTEXT, eptp, 0); + __invept(VMX_EPT_EXTENT_CONTEXT, vmx->eptp, 0); else ept_sync_global(); } } =2Dstatic inline void ept_sync_individual_addr(u64 eptp, gpa_t gpa) +static inline void ept_sync_individual_addr(struct vcpu_vmx *vmx,=20 gpa_t gpa) { if (vm_need_ept()) { if (cpu_has_vmx_invept_individual_addr()) __invept(VMX_EPT_EXTENT_INDIVIDUAL_ADDR, =2D eptp, gpa); + vmx->eptp, gpa); else =2D ept_sync_context(eptp); + ept_sync_context(vmx); } } @@ -1407,6 +1408,8 @@ static void exit_lmode(struct kvm_vcpu *vcpu) static void vmx_flush_tlb(struct kvm_vcpu *vcpu) { vpid_sync_vcpu_all(to_vmx(vcpu)); + if (vm_need_ept()) + ept_sync_context(to_vmx(vcpu)); } static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu) @@ -1517,12 +1520,15 @@ static void vmx_set_cr3(struct kvm_vcpu *vcpu,=20 unsigned long cr3) { unsigned long guest_cr3; u64 eptp; + struct vcpu_vmx *vmx; + vmx =3D to_vmx(vcpu); guest_cr3 =3D cr3; if (vm_need_ept()) { eptp =3D construct_eptp(cr3); vmcs_write64(EPT_POINTER, eptp); =2D ept_sync_context(eptp); + vmx->eptp =3D eptp; + ept_sync_context(vmx); ept_load_pdptrs(vcpu); guest_cr3 =3D is_paging(vcpu) ? vcpu->arch.cr3 : VMX_EPT_IDENTITY_PAGETABLE_ADDR; =2D- 1.5.5 --Boundary-00=_uMIWI673ackkG6J Content-Type: text/x-diff; charset="utf-8"; name="0001-KVM-VMX-Add-ept_sync_context-in-flush_tlb.patch" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="0001-KVM-VMX-Add-ept_sync_context-in-flush_tlb.patch" =46rom 54dc26e44f1c0aa460bef409b799f36dae56a911 Mon Sep 17 00:00:00 2001 =46rom: Sheng Yang Date: Wed, 18 Jun 2008 11:23:13 +0800 Subject: [PATCH] KVM: VMX: Add ept_sync_context in flush_tlb =46ix a potention issue caused by kvm_mmu_slot_remove_write_access(). The old behavior don't sync EPT TLB with modified EPT entry, which result in inconsistent content of EPT TLB and EPT table. Signed-off-by: Sheng Yang =2D-- arch/x86/kvm/vmx.c | 18 ++++++++++++------ 1 files changed, 12 insertions(+), 6 deletions(-) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 6e4278d..5e2a800 100644 =2D-- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -83,6 +83,7 @@ struct vcpu_vmx { } irq; } rmode; int vpid; + u64 eptp; }; =20 static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu) @@ -364,24 +365,24 @@ static inline void ept_sync_global(void) __invept(VMX_EPT_EXTENT_GLOBAL, 0, 0); } =20 =2Dstatic inline void ept_sync_context(u64 eptp) +static inline void ept_sync_context(struct vcpu_vmx *vmx) { if (vm_need_ept()) { if (cpu_has_vmx_invept_context()) =2D __invept(VMX_EPT_EXTENT_CONTEXT, eptp, 0); + __invept(VMX_EPT_EXTENT_CONTEXT, vmx->eptp, 0); else ept_sync_global(); } } =20 =2Dstatic inline void ept_sync_individual_addr(u64 eptp, gpa_t gpa) +static inline void ept_sync_individual_addr(struct vcpu_vmx *vmx, gpa_t gp= a) { if (vm_need_ept()) { if (cpu_has_vmx_invept_individual_addr()) __invept(VMX_EPT_EXTENT_INDIVIDUAL_ADDR, =2D eptp, gpa); + vmx->eptp, gpa); else =2D ept_sync_context(eptp); + ept_sync_context(vmx); } } =20 @@ -1407,6 +1408,8 @@ static void exit_lmode(struct kvm_vcpu *vcpu) static void vmx_flush_tlb(struct kvm_vcpu *vcpu) { vpid_sync_vcpu_all(to_vmx(vcpu)); + if (vm_need_ept()) + ept_sync_context(to_vmx(vcpu)); } =20 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu) @@ -1517,12 +1520,15 @@ static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsi= gned long cr3) { unsigned long guest_cr3; u64 eptp; + struct vcpu_vmx *vmx; =20 + vmx =3D to_vmx(vcpu); guest_cr3 =3D cr3; if (vm_need_ept()) { eptp =3D construct_eptp(cr3); vmcs_write64(EPT_POINTER, eptp); =2D ept_sync_context(eptp); + vmx->eptp =3D eptp; + ept_sync_context(vmx); ept_load_pdptrs(vcpu); guest_cr3 =3D is_paging(vcpu) ? vcpu->arch.cr3 : VMX_EPT_IDENTITY_PAGETABLE_ADDR; =2D-=20 1.5.5 --Boundary-00=_uMIWI673ackkG6J--