From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Yang, Sheng" Subject: Re: [PATCH] [REPOST]: Fake emulate Intel perfctr MSRs Date: Thu, 19 Jun 2008 19:37:31 +0800 Message-ID: <200806191937.31593.sheng.yang@intel.com> References: <485A0772.1050606@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Cc: Chris Lalancette To: kvm@vger.kernel.org Return-path: Received: from mga02.intel.com ([134.134.136.20]:56027 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753113AbYFSLhe (ORCPT ); Thu, 19 Jun 2008 07:37:34 -0400 In-Reply-To: <485A0772.1050606@redhat.com> Content-Disposition: inline Sender: kvm-owner@vger.kernel.org List-ID: On Thursday 19 June 2008 15:14:58 Chris Lalancette wrote: > Attached is a patch for fake emulating Intel perfctr MSRs, similar to the > recent patch to fake emulate the AMD perfctr MSRs. This is needed for a > reason similar for the previous patch; older linux guests (in this case, > 2.6.9) can attempt to access the MSR's without a fixup section, and > injecting a GPF kills the guest. Tested by me on RHEL-4 i386 and x86_64 > guests, as well as F-9 guests. > > Signed-off-by: Chris Lalancette Hi, Chris It seems you can use something like MSR_P6_EVNTSEL0 to avoid brought in new #include? :) (BTW: these four MSRs are P6 architecture specific ones, and two of them shared by Pentium architecture) -- Thanks Yang, Sheng