public inbox for kvm@vger.kernel.org
 help / color / mirror / Atom feed
* [PATCH] KVM: VMX: Add ept_sync_context in flush_tlb
@ 2008-06-18  3:38 Yang, Sheng
  2008-06-25 12:02 ` Avi Kivity
  0 siblings, 1 reply; 6+ messages in thread
From: Yang, Sheng @ 2008-06-18  3:38 UTC (permalink / raw)
  To: kvm

[-- Attachment #1: Type: text/plain, Size: 2480 bytes --]

From 54dc26e44f1c0aa460bef409b799f36dae56a911 Mon Sep 17 00:00:00 2001
From: Sheng Yang <sheng.yang@intel.com>
Date: Wed, 18 Jun 2008 11:23:13 +0800
Subject: [PATCH] KVM: VMX: Add ept_sync_context in flush_tlb

Fix a potention issue caused by kvm_mmu_slot_remove_write_access(). 
The old behavior don't sync EPT TLB with modified EPT entry, which 
result in inconsistent content of EPT TLB and EPT table.

Signed-off-by: Sheng Yang <sheng.yang@intel.com>
---
 arch/x86/kvm/vmx.c |   18 ++++++++++++------
 1 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 6e4278d..5e2a800 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -83,6 +83,7 @@ struct vcpu_vmx {
 		} irq;
 	} rmode;
 	int vpid;
+	u64 eptp;
 };

 static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu)
@@ -364,24 +365,24 @@ static inline void ept_sync_global(void)
 		__invept(VMX_EPT_EXTENT_GLOBAL, 0, 0);
 }

-static inline void ept_sync_context(u64 eptp)
+static inline void ept_sync_context(struct vcpu_vmx *vmx)
 {
 	if (vm_need_ept()) {
 		if (cpu_has_vmx_invept_context())
-			__invept(VMX_EPT_EXTENT_CONTEXT, eptp, 0);
+			__invept(VMX_EPT_EXTENT_CONTEXT, vmx->eptp, 0);
 		else
 			ept_sync_global();
 	}
 }

-static inline void ept_sync_individual_addr(u64 eptp, gpa_t gpa)
+static inline void ept_sync_individual_addr(struct vcpu_vmx *vmx, 
gpa_t gpa)
 {
 	if (vm_need_ept()) {
 		if (cpu_has_vmx_invept_individual_addr())
 			__invept(VMX_EPT_EXTENT_INDIVIDUAL_ADDR,
-					eptp, gpa);
+					vmx->eptp, gpa);
 		else
-			ept_sync_context(eptp);
+			ept_sync_context(vmx);
 	}
 }

@@ -1407,6 +1408,8 @@ static void exit_lmode(struct kvm_vcpu *vcpu)
 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
 {
 	vpid_sync_vcpu_all(to_vmx(vcpu));
+	if (vm_need_ept())
+		ept_sync_context(to_vmx(vcpu));
 }

 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
@@ -1517,12 +1520,15 @@ static void vmx_set_cr3(struct kvm_vcpu *vcpu, 
unsigned long cr3)
 {
 	unsigned long guest_cr3;
 	u64 eptp;
+	struct vcpu_vmx *vmx;

+	vmx = to_vmx(vcpu);
 	guest_cr3 = cr3;
 	if (vm_need_ept()) {
 		eptp = construct_eptp(cr3);
 		vmcs_write64(EPT_POINTER, eptp);
-		ept_sync_context(eptp);
+		vmx->eptp = eptp;
+		ept_sync_context(vmx);
 		ept_load_pdptrs(vcpu);
 		guest_cr3 = is_paging(vcpu) ? vcpu->arch.cr3 :
 			VMX_EPT_IDENTITY_PAGETABLE_ADDR;
--
1.5.5


[-- Attachment #2: 0001-KVM-VMX-Add-ept_sync_context-in-flush_tlb.patch --]
[-- Type: text/x-diff, Size: 2481 bytes --]

From 54dc26e44f1c0aa460bef409b799f36dae56a911 Mon Sep 17 00:00:00 2001
From: Sheng Yang <sheng.yang@intel.com>
Date: Wed, 18 Jun 2008 11:23:13 +0800
Subject: [PATCH] KVM: VMX: Add ept_sync_context in flush_tlb

Fix a potention issue caused by kvm_mmu_slot_remove_write_access(). The
old behavior don't sync EPT TLB with modified EPT entry, which result
in inconsistent content of EPT TLB and EPT table.

Signed-off-by: Sheng Yang <sheng.yang@intel.com>
---
 arch/x86/kvm/vmx.c |   18 ++++++++++++------
 1 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 6e4278d..5e2a800 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -83,6 +83,7 @@ struct vcpu_vmx {
 		} irq;
 	} rmode;
 	int vpid;
+	u64 eptp;
 };
 
 static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu)
@@ -364,24 +365,24 @@ static inline void ept_sync_global(void)
 		__invept(VMX_EPT_EXTENT_GLOBAL, 0, 0);
 }
 
-static inline void ept_sync_context(u64 eptp)
+static inline void ept_sync_context(struct vcpu_vmx *vmx)
 {
 	if (vm_need_ept()) {
 		if (cpu_has_vmx_invept_context())
-			__invept(VMX_EPT_EXTENT_CONTEXT, eptp, 0);
+			__invept(VMX_EPT_EXTENT_CONTEXT, vmx->eptp, 0);
 		else
 			ept_sync_global();
 	}
 }
 
-static inline void ept_sync_individual_addr(u64 eptp, gpa_t gpa)
+static inline void ept_sync_individual_addr(struct vcpu_vmx *vmx, gpa_t gpa)
 {
 	if (vm_need_ept()) {
 		if (cpu_has_vmx_invept_individual_addr())
 			__invept(VMX_EPT_EXTENT_INDIVIDUAL_ADDR,
-					eptp, gpa);
+					vmx->eptp, gpa);
 		else
-			ept_sync_context(eptp);
+			ept_sync_context(vmx);
 	}
 }
 
@@ -1407,6 +1408,8 @@ static void exit_lmode(struct kvm_vcpu *vcpu)
 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
 {
 	vpid_sync_vcpu_all(to_vmx(vcpu));
+	if (vm_need_ept())
+		ept_sync_context(to_vmx(vcpu));
 }
 
 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
@@ -1517,12 +1520,15 @@ static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 {
 	unsigned long guest_cr3;
 	u64 eptp;
+	struct vcpu_vmx *vmx;
 
+	vmx = to_vmx(vcpu);
 	guest_cr3 = cr3;
 	if (vm_need_ept()) {
 		eptp = construct_eptp(cr3);
 		vmcs_write64(EPT_POINTER, eptp);
-		ept_sync_context(eptp);
+		vmx->eptp = eptp;
+		ept_sync_context(vmx);
 		ept_load_pdptrs(vcpu);
 		guest_cr3 = is_paging(vcpu) ? vcpu->arch.cr3 :
 			VMX_EPT_IDENTITY_PAGETABLE_ADDR;
-- 
1.5.5


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH] KVM: VMX: Add ept_sync_context in flush_tlb
  2008-06-18  3:38 [PATCH] KVM: VMX: Add ept_sync_context in flush_tlb Yang, Sheng
@ 2008-06-25 12:02 ` Avi Kivity
  2008-06-26  0:47   ` Yang, Sheng
  0 siblings, 1 reply; 6+ messages in thread
From: Avi Kivity @ 2008-06-25 12:02 UTC (permalink / raw)
  To: Yang, Sheng; +Cc: kvm

Yang, Sheng wrote:
> From 54dc26e44f1c0aa460bef409b799f36dae56a911 Mon Sep 17 00:00:00 2001
> From: Sheng Yang <sheng.yang@intel.com>
> Date: Wed, 18 Jun 2008 11:23:13 +0800
> Subject: [PATCH] KVM: VMX: Add ept_sync_context in flush_tlb
>
> Fix a potention issue caused by kvm_mmu_slot_remove_write_access(). 
> The old behavior don't sync EPT TLB with modified EPT entry, which 
> result in inconsistent content of EPT TLB and EPT table.
>
>
> @@ -1407,6 +1408,8 @@ static void exit_lmode(struct kvm_vcpu *vcpu)
>  static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
>  {
>  	vpid_sync_vcpu_all(to_vmx(vcpu));
> +	if (vm_need_ept())
> +		ept_sync_context(to_vmx(vcpu));
>  }
>   

So we're flushing both the vpid tlb and the ept context?  What does an 
ept context flush mean exactly?  tlb entries for gpa->hpa?


-- 
error compiling committee.c: too many arguments to function


^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] KVM: VMX: Add ept_sync_context in flush_tlb
  2008-06-25 12:02 ` Avi Kivity
@ 2008-06-26  0:47   ` Yang, Sheng
  2008-06-29 10:09     ` Avi Kivity
  0 siblings, 1 reply; 6+ messages in thread
From: Yang, Sheng @ 2008-06-26  0:47 UTC (permalink / raw)
  To: Avi Kivity; +Cc: kvm

On Wednesday 25 June 2008 20:02:17 Avi Kivity wrote:
> Yang, Sheng wrote:
> > From 54dc26e44f1c0aa460bef409b799f36dae56a911 Mon Sep 17 00:00:00 2001
> > From: Sheng Yang <sheng.yang@intel.com>
> > Date: Wed, 18 Jun 2008 11:23:13 +0800
> > Subject: [PATCH] KVM: VMX: Add ept_sync_context in flush_tlb
> >
> > Fix a potention issue caused by kvm_mmu_slot_remove_write_access().
> > The old behavior don't sync EPT TLB with modified EPT entry, which
> > result in inconsistent content of EPT TLB and EPT table.
> >
> >
> > @@ -1407,6 +1408,8 @@ static void exit_lmode(struct kvm_vcpu *vcpu)
> >  static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
> >  {
> >  	vpid_sync_vcpu_all(to_vmx(vcpu));
> > +	if (vm_need_ept())
> > +		ept_sync_context(to_vmx(vcpu));
> >  }
>
> So we're flushing both the vpid tlb and the ept context?  What does an
> ept context flush mean exactly?  tlb entries for gpa->hpa?

Yeah, the entries for gpa->hpa. So if we don't do this, cpu may see rw entry 
rather than ro, then write to it directly rather than fall into KVM. 

-- 
Thanks
Yang, Sheng

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] KVM: VMX: Add ept_sync_context in flush_tlb
  2008-06-26  0:47   ` Yang, Sheng
@ 2008-06-29 10:09     ` Avi Kivity
  2008-07-06 11:20       ` Yang, Sheng
  0 siblings, 1 reply; 6+ messages in thread
From: Avi Kivity @ 2008-06-29 10:09 UTC (permalink / raw)
  To: Yang, Sheng; +Cc: kvm

Yang, Sheng wrote:
> On Wednesday 25 June 2008 20:02:17 Avi Kivity wrote:
>   
>> Yang, Sheng wrote:
>>     
>>> From 54dc26e44f1c0aa460bef409b799f36dae56a911 Mon Sep 17 00:00:00 2001
>>> From: Sheng Yang <sheng.yang@intel.com>
>>> Date: Wed, 18 Jun 2008 11:23:13 +0800
>>> Subject: [PATCH] KVM: VMX: Add ept_sync_context in flush_tlb
>>>
>>> Fix a potention issue caused by kvm_mmu_slot_remove_write_access().
>>> The old behavior don't sync EPT TLB with modified EPT entry, which
>>> result in inconsistent content of EPT TLB and EPT table.
>>>
>>>
>>> @@ -1407,6 +1408,8 @@ static void exit_lmode(struct kvm_vcpu *vcpu)
>>>  static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
>>>  {
>>>  	vpid_sync_vcpu_all(to_vmx(vcpu));
>>> +	if (vm_need_ept())
>>> +		ept_sync_context(to_vmx(vcpu));
>>>  }
>>>       
>> So we're flushing both the vpid tlb and the ept context?  What does an
>> ept context flush mean exactly?  tlb entries for gpa->hpa?
>>     
>
> Yeah, the entries for gpa->hpa. So if we don't do this, cpu may see rw entry 
> rather than ro, then write to it directly rather than fall into KVM. 
>
>   

I see.  Back to the patch, can't you replace vmx->eptp by 
construct_eptp(vcpu->arch.mmu.root_hpa)?

-- 
error compiling committee.c: too many arguments to function


^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] KVM: VMX: Add ept_sync_context in flush_tlb
  2008-06-29 10:09     ` Avi Kivity
@ 2008-07-06 11:20       ` Yang, Sheng
  2008-07-06 11:55         ` Avi Kivity
  0 siblings, 1 reply; 6+ messages in thread
From: Yang, Sheng @ 2008-07-06 11:20 UTC (permalink / raw)
  To: kvm; +Cc: Avi Kivity

[-- Attachment #1: Type: text/plain, Size: 2032 bytes --]

On Sunday 29 June 2008 18:09:20 Avi Kivity wrote:
>
> I see.  Back to the patch, can't you replace vmx->eptp by
> construct_eptp(vcpu->arch.mmu.root_hpa)?

Modified follow Avi's advice. Sorry for miss the mail...

From 251b611f7e90833aa07184e69ffe133fbcd83c76 Mon Sep 17 00:00:00 2001
From: Sheng Yang <sheng.yang@intel.com>
Date: Sun, 6 Jul 2008 19:16:51 +0800
Subject: [PATCH] KVM: VMX: Add ept_sync_context in flush_tlb

Fix a potention issue caused by kvm_mmu_slot_remove_write_access(). 
The
old behavior don't sync EPT TLB with modified EPT entry, which result
in inconsistent content of EPT TLB and EPT table.

Signed-off-by: Sheng Yang <sheng.yang@intel.com>
---
 arch/x86/kvm/vmx.c |   26 ++++++++++++++------------
 1 files changed, 14 insertions(+), 12 deletions(-)

diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index d425246..09bc642 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -1415,9 +1415,23 @@ static void exit_lmode(struct kvm_vcpu *vcpu)

 #endif

+static u64 construct_eptp(unsigned long root_hpa)
+{
+	u64 eptp;
+
+	/* TODO write the value reading from MSR */
+	eptp = VMX_EPT_DEFAULT_MT |
+		VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT;
+	eptp |= (root_hpa & PAGE_MASK);
+
+	return eptp;
+}
+
 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
 {
 	vpid_sync_vcpu_all(to_vmx(vcpu));
+	if (vm_need_ept())
+		ept_sync_context(construct_eptp(vcpu->arch.mmu.root_hpa));
 }

 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
@@ -1512,18 +1526,6 @@ static void vmx_set_cr0(struct kvm_vcpu *vcpu, 
unsigned long cr0)
 		vmx_fpu_activate(vcpu);
 }

-static u64 construct_eptp(unsigned long root_hpa)
-{
-	u64 eptp;
-
-	/* TODO write the value reading from MSR */
-	eptp = VMX_EPT_DEFAULT_MT |
-		VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT;
-	eptp |= (root_hpa & PAGE_MASK);
-
-	return eptp;
-}
-
 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 {
 	unsigned long guest_cr3;
--
1.5.5.4


[-- Attachment #2: 0001-KVM-VMX-Add-ept_sync_context-in-flush_tlb.patch --]
[-- Type: text/x-diff, Size: 1812 bytes --]

From 251b611f7e90833aa07184e69ffe133fbcd83c76 Mon Sep 17 00:00:00 2001
From: Sheng Yang <sheng.yang@intel.com>
Date: Sun, 6 Jul 2008 19:16:51 +0800
Subject: [PATCH] KVM: VMX: Add ept_sync_context in flush_tlb

Fix a potention issue caused by kvm_mmu_slot_remove_write_access(). The
old behavior don't sync EPT TLB with modified EPT entry, which result
in inconsistent content of EPT TLB and EPT table.

Signed-off-by: Sheng Yang <sheng.yang@intel.com>
---
 arch/x86/kvm/vmx.c |   26 ++++++++++++++------------
 1 files changed, 14 insertions(+), 12 deletions(-)

diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index d425246..09bc642 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -1415,9 +1415,23 @@ static void exit_lmode(struct kvm_vcpu *vcpu)
 
 #endif
 
+static u64 construct_eptp(unsigned long root_hpa)
+{
+	u64 eptp;
+
+	/* TODO write the value reading from MSR */
+	eptp = VMX_EPT_DEFAULT_MT |
+		VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT;
+	eptp |= (root_hpa & PAGE_MASK);
+
+	return eptp;
+}
+
 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
 {
 	vpid_sync_vcpu_all(to_vmx(vcpu));
+	if (vm_need_ept())
+		ept_sync_context(construct_eptp(vcpu->arch.mmu.root_hpa));
 }
 
 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
@@ -1512,18 +1526,6 @@ static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 		vmx_fpu_activate(vcpu);
 }
 
-static u64 construct_eptp(unsigned long root_hpa)
-{
-	u64 eptp;
-
-	/* TODO write the value reading from MSR */
-	eptp = VMX_EPT_DEFAULT_MT |
-		VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT;
-	eptp |= (root_hpa & PAGE_MASK);
-
-	return eptp;
-}
-
 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 {
 	unsigned long guest_cr3;
-- 
1.5.5.4


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH] KVM: VMX: Add ept_sync_context in flush_tlb
  2008-07-06 11:20       ` Yang, Sheng
@ 2008-07-06 11:55         ` Avi Kivity
  0 siblings, 0 replies; 6+ messages in thread
From: Avi Kivity @ 2008-07-06 11:55 UTC (permalink / raw)
  To: Yang, Sheng; +Cc: kvm

Yang, Sheng wrote:
> On Sunday 29 June 2008 18:09:20 Avi Kivity wrote:
>   
>> I see.  Back to the patch, can't you replace vmx->eptp by
>> construct_eptp(vcpu->arch.mmu.root_hpa)?
>>     
>
> Modified follow Avi's advice. Sorry for miss the mail...
>
> From 251b611f7e90833aa07184e69ffe133fbcd83c76 Mon Sep 17 00:00:00 2001
> From: Sheng Yang <sheng.yang@intel.com>
> Date: Sun, 6 Jul 2008 19:16:51 +0800
> Subject: [PATCH] KVM: VMX: Add ept_sync_context in flush_tlb
>
> Fix a potention issue caused by kvm_mmu_slot_remove_write_access(). 
> The
> old behavior don't sync EPT TLB with modified EPT entry, which result
> in inconsistent content of EPT TLB and EPT table.
>
>   

Applied, thanks.

> +static u64 construct_eptp(unsigned long root_hpa)
> +{
> +	u64 eptp;
> +
> +	/* TODO write the value reading from MSR */
> +	eptp = VMX_EPT_DEFAULT_MT |
> +		VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT;
> +	eptp |= (root_hpa & PAGE_MASK);
> +
> +	return eptp;
> +}
> +
> -static u64 construct_eptp(unsigned long root_hpa)
> -{
> -	u64 eptp;
> -
> -	/* TODO write the value reading from MSR */
> -	eptp = VMX_EPT_DEFAULT_MT |
> -		VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT;
> -	eptp |= (root_hpa & PAGE_MASK);
> -
> -	return eptp;
> -}
> -
>   

I added a forward declaration rather than move the code to make it clear 
there are no changes here.


-- 
error compiling committee.c: too many arguments to function


^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2008-07-06 11:55 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2008-06-18  3:38 [PATCH] KVM: VMX: Add ept_sync_context in flush_tlb Yang, Sheng
2008-06-25 12:02 ` Avi Kivity
2008-06-26  0:47   ` Yang, Sheng
2008-06-29 10:09     ` Avi Kivity
2008-07-06 11:20       ` Yang, Sheng
2008-07-06 11:55         ` Avi Kivity

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox