From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Yang, Sheng" Subject: Re: [PATCH] KVM: VMX: Add ept_sync_context in flush_tlb Date: Sun, 6 Jul 2008 19:20:02 +0800 Message-ID: <200807061920.02935.sheng.yang@intel.com> References: <200806181138.22990.sheng.yang@intel.com> <200806260847.14386.sheng.yang@intel.com> <48675F50.9000905@qumranet.com> Mime-Version: 1.0 Content-Type: Multipart/Mixed; boundary="Boundary-00=_ipKcIvSNTtWvmPd" Cc: Avi Kivity To: kvm@vger.kernel.org Return-path: Received: from mga01.intel.com ([192.55.52.88]:17979 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752630AbYGFLTB (ORCPT ); Sun, 6 Jul 2008 07:19:01 -0400 In-Reply-To: <48675F50.9000905@qumranet.com> Sender: kvm-owner@vger.kernel.org List-ID: --Boundary-00=_ipKcIvSNTtWvmPd Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline On Sunday 29 June 2008 18:09:20 Avi Kivity wrote: > > I see. Back to the patch, can't you replace vmx->eptp by > construct_eptp(vcpu->arch.mmu.root_hpa)? Modified follow Avi's advice. Sorry for miss the mail... =46rom 251b611f7e90833aa07184e69ffe133fbcd83c76 Mon Sep 17 00:00:00 2001 =46rom: Sheng Yang Date: Sun, 6 Jul 2008 19:16:51 +0800 Subject: [PATCH] KVM: VMX: Add ept_sync_context in flush_tlb =46ix a potention issue caused by kvm_mmu_slot_remove_write_access().=20 The old behavior don't sync EPT TLB with modified EPT entry, which result in inconsistent content of EPT TLB and EPT table. Signed-off-by: Sheng Yang =2D-- arch/x86/kvm/vmx.c | 26 ++++++++++++++------------ 1 files changed, 14 insertions(+), 12 deletions(-) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index d425246..09bc642 100644 =2D-- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -1415,9 +1415,23 @@ static void exit_lmode(struct kvm_vcpu *vcpu) #endif +static u64 construct_eptp(unsigned long root_hpa) +{ + u64 eptp; + + /* TODO write the value reading from MSR */ + eptp =3D VMX_EPT_DEFAULT_MT | + VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT; + eptp |=3D (root_hpa & PAGE_MASK); + + return eptp; +} + static void vmx_flush_tlb(struct kvm_vcpu *vcpu) { vpid_sync_vcpu_all(to_vmx(vcpu)); + if (vm_need_ept()) + ept_sync_context(construct_eptp(vcpu->arch.mmu.root_hpa)); } static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu) @@ -1512,18 +1526,6 @@ static void vmx_set_cr0(struct kvm_vcpu *vcpu,=20 unsigned long cr0) vmx_fpu_activate(vcpu); } =2Dstatic u64 construct_eptp(unsigned long root_hpa) =2D{ =2D u64 eptp; =2D =2D /* TODO write the value reading from MSR */ =2D eptp =3D VMX_EPT_DEFAULT_MT | =2D VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT; =2D eptp |=3D (root_hpa & PAGE_MASK); =2D =2D return eptp; =2D} =2D static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3) { unsigned long guest_cr3; =2D- 1.5.5.4 --Boundary-00=_ipKcIvSNTtWvmPd Content-Type: text/x-diff; charset="utf-8"; name="0001-KVM-VMX-Add-ept_sync_context-in-flush_tlb.patch" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="0001-KVM-VMX-Add-ept_sync_context-in-flush_tlb.patch" =46rom 251b611f7e90833aa07184e69ffe133fbcd83c76 Mon Sep 17 00:00:00 2001 =46rom: Sheng Yang Date: Sun, 6 Jul 2008 19:16:51 +0800 Subject: [PATCH] KVM: VMX: Add ept_sync_context in flush_tlb =46ix a potention issue caused by kvm_mmu_slot_remove_write_access(). The old behavior don't sync EPT TLB with modified EPT entry, which result in inconsistent content of EPT TLB and EPT table. Signed-off-by: Sheng Yang =2D-- arch/x86/kvm/vmx.c | 26 ++++++++++++++------------ 1 files changed, 14 insertions(+), 12 deletions(-) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index d425246..09bc642 100644 =2D-- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -1415,9 +1415,23 @@ static void exit_lmode(struct kvm_vcpu *vcpu) =20 #endif =20 +static u64 construct_eptp(unsigned long root_hpa) +{ + u64 eptp; + + /* TODO write the value reading from MSR */ + eptp =3D VMX_EPT_DEFAULT_MT | + VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT; + eptp |=3D (root_hpa & PAGE_MASK); + + return eptp; +} + static void vmx_flush_tlb(struct kvm_vcpu *vcpu) { vpid_sync_vcpu_all(to_vmx(vcpu)); + if (vm_need_ept()) + ept_sync_context(construct_eptp(vcpu->arch.mmu.root_hpa)); } =20 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu) @@ -1512,18 +1526,6 @@ static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsig= ned long cr0) vmx_fpu_activate(vcpu); } =20 =2Dstatic u64 construct_eptp(unsigned long root_hpa) =2D{ =2D u64 eptp; =2D =2D /* TODO write the value reading from MSR */ =2D eptp =3D VMX_EPT_DEFAULT_MT | =2D VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT; =2D eptp |=3D (root_hpa & PAGE_MASK); =2D =2D return eptp; =2D} =2D static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3) { unsigned long guest_cr3; =2D-=20 1.5.5.4 --Boundary-00=_ipKcIvSNTtWvmPd--