From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jesse Barnes Subject: Re: [PATCH v12 1/8] PCI: initialize and release SR-IOV capability Date: Fri, 20 Mar 2009 10:54:09 -0700 Message-ID: <20090320105409.5ed80885@hobbes.lan> References: <1237519518-24048-1-git-send-email-yu.zhao@intel.com> <1237519518-24048-2-git-send-email-yu.zhao@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Cc: linux-pci@vger.kernel.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Yu Zhao To: Yu Zhao Return-path: In-Reply-To: <1237519518-24048-2-git-send-email-yu.zhao@intel.com> Sender: linux-pci-owner@vger.kernel.org List-Id: kvm.vger.kernel.org On Fri, 20 Mar 2009 11:25:11 +0800 Yu Zhao wrote: > If a device has the SR-IOV capability, initialize it (set the ARI > Capable Hierarchy in the lowest numbered PF if necessary; calculate > the System Page Size for the VF MMIO, probe the VF Offset, Stride > and BARs). A lock for the VF bus allocation is also initialized if > a PF is the lowest numbered PF. > > Reviewed-by: Matthew Wilcox > Signed-off-by: Yu Zhao I applied this series to my linux-next branch, but there were a few conflicts here and there, so please check it out. Looks like from start to finish this took about 6 months to get banged into shape, thanks for staying on it, Yu! -- Jesse Barnes, Intel Open Source Technology Center