Re: [PATCH v12 1/8] PCI: initialize and release SR-IOV capability

[Jesse Barnes <jbarnes@virtuousgeek.org>]

On Sat, 21 Mar 2009 22:05:11 +0800
Yu Zhao <yu.zhao@intel.com> wrote:

> On Sat, Mar 21, 2009 at 01:54:09AM +0800, Jesse Barnes wrote:
> > On Fri, 20 Mar 2009 11:25:11 +0800
> > Yu Zhao <yu.zhao@intel.com> wrote:
> > 
> > > If a device has the SR-IOV capability, initialize it (set the ARI
> > > Capable Hierarchy in the lowest numbered PF if necessary;
> > > calculate the System Page Size for the VF MMIO, probe the VF
> > > Offset, Stride and BARs). A lock for the VF bus allocation is
> > > also initialized if a PF is the lowest numbered PF.
> > > 
> > > Reviewed-by: Matthew Wilcox <willy@linux.intel.com>
> > > Signed-off-by: Yu Zhao <yu.zhao@intel.com>
> > 
> > I applied this series to my linux-next branch, but there were a few
> > conflicts here and there, so please check it out.  Looks like from
> > start to finish this took about 6 months to get banged into shape,
> > thanks for staying on it, Yu!
> 
> Yes, I checked them and found there is conflict between the SR-IOV
> changes and Yinghai's 'PCI/x86: detect host bridge config space size
> w/o using quirks'. Following is the fix, thanks!
> 
> 
> New pci_cfg_space_size() needs invalid pdev->class, put it in the
> right place in the pci_setup_device().
> 
> Signed-off-by: Yu Zhao <yu.zhao@intel.com>

Applied, thanks Yu.

-- 
Jesse Barnes, Intel Open Source Technology Center