From mboxrd@z Thu Jan  1 00:00:00 1970
From: Gleb Natapov <gleb@redhat.com>
Subject: Re: [PATCH 05/15] Coalesce userspace/kernel irqchip interrupt
	injection logic.
Date: Sat, 18 Apr 2009 19:28:20 +0300
Message-ID: <20090418162820.GI27675@redhat.com>
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Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>,
	kvm@vger.kernel.org, Avi Kivity <avi@redhat.com>,
	Joerg Roedel <joerg.roedel@amd.com>
To: Jan Kiszka <jan.kiszka@web.de>
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On Sat, Apr 18, 2009 at 11:16:47AM +0200, Jan Kiszka wrote:
> Dmitry Eremin-Solenikov wrote:
> > Gleb Natapov wrote:
> > 
> >> Start to use interrupt/exception queues like VMX does. This also fix the
> >> bug that if exit was caused by a guest internal exception access to IDT
> >> the exception was not reinjected.
> >>
> > 
> > 
> > OK. On real SVM HW this seems to work. However now i'm stumbled upon another
> > problem wrt. NMI. See another mail.
> > 
> 
> I can confirm that this series (probably this patch) breaks the
> following scenario:
> 
> qemu-system-x86_64 (qemu trunk, emulation mode)
>     linux (kvm.git) with kvm-amd + kvm-userspace
>         linux (the same kvm.git)
> 
> The second-level guest hangs in the mid of its boot, maybe no longer
> receiving some or any interrupt.
> 
> So this patch may either expose a bug in the svm emulation of qemu or
> comes with a subtle regression that only triggers due to qemu's timing.
> This needs to be understood. Gleb, any progress on reproducing it on
> your side?
> 
I reproduced it and I am debugging it. In my case the boot hangs on sti;hlt
sequence. Instrumentation thus far shows that at this point interrupts no longer
injected because ppr value is too big. Need to see why, but tpr handling
is not complete in qemu svm. May be this is the reason. Will know more
tomorrow.

--
			Gleb.