From: Bruce MaJia <bruce.majia@gmail.com>
To: Gregory Haskins <gregory.haskins@gmail.com>
Cc: kvm@vger.kernel.org
Subject: Re: question on KVM run flow on Intel-VT
Date: Wed, 22 Apr 2009 22:55:48 +0800 [thread overview]
Message-ID: <20090422145548.GA15051@LL.wrs.com> (raw)
In-Reply-To: <49EF2423.2070306@gmail.com>
Hi Greg,
On Wed, Apr 22, 2009 at 10:05:23AM -0400, Gregory Haskins wrote:
> Hi Bruce,
>
> Bruce MaJia wrote:
> > On Wed, Apr 22, 2009 at 08:55:49PM +0800, MaJia wrote:
> >
> >> Hi,
> >>
> >> I am learning kvm + Intel-VT nowadays. Since I am rookie on both kvm and
> >> Intel-VT, I got following questions about run flow of kvm on vmx.
> >>
>
> The Intel Software Developers Manual, Volume 3B, Chapter 21 is your
> friend :)
>
> http://download.intel.com/design/processor/manuals/253669.pdf
Thanks for your response.
I actually take a quick glance at the Ch21 of Vol3B. I can found a list
in the chapter about 'xxx instruction will cause' vmexit and 'xxx will
cause vmexit if reg.xyz == abc' or 'xxx will not cause vmexit on
condition zzz'. But I could not find some clarification about:
? What is the cpu mode when vmexit occur.
? What is the behavior of cpu.
? Will it fetch next instruction from fixed phy addr?
? Or will it read next instruction from according vmcs?
? Or the cpu will just follow the standard process to handle
interrupt/exception?
Maybe I went too fast and miss some important information. Will you
speard a few words to guide me to correct point? Thanks in advance.
Bruce.
>
> HTH,
> -Greg
>
>
prev parent reply other threads:[~2009-04-22 14:56 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-04-22 12:55 question on KVM run flow on Intel-VT MaJia
2009-04-22 13:24 ` Bruce MaJia
2009-04-22 14:05 ` Gregory Haskins
2009-04-22 14:55 ` Bruce MaJia [this message]
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