From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paul Brook Subject: Re: [Qemu-devel] [PATCH] bios: Use the correct mask to size the PCI option ROM BAR Date: Tue, 12 May 2009 23:41:40 +0100 Message-ID: <200905122341.40706.paul@codesourcery.com> References: <1242167590.4788.20.camel@2710p.home> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Cc: Alex Williamson , kvm-devel To: qemu-devel@nongnu.org Return-path: Received: from mail.codesourcery.com ([65.74.133.4]:49031 "EHLO mail.codesourcery.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752395AbZELWlm (ORCPT ); Tue, 12 May 2009 18:41:42 -0400 In-Reply-To: <1242167590.4788.20.camel@2710p.home> Content-Disposition: inline Sender: kvm-owner@vger.kernel.org List-ID: On Tuesday 12 May 2009, Alex Williamson wrote: > Bit 0 is the enable bit, which we not only don't want to set, but > it will stick and make us think it's an I/O port resource. Why is the ROM slot special? Doesn't the same apply to all BARs? Paul