Re: [PATCH 2/6] MMU: don't bail on PAT bits in PTE

["Michael S. Tsirkin" <mst@redhat.com>]

On Fri, May 15, 2009 at 10:22:16AM +0200, Alexander Graf wrote:
> A 64bit PTE can have bit7 set to 1 which means "Use this bit for the PAT".
> Currently KVM's MMU code treats this bit as reserved, even though it's not.
> 
> As long as we're not required to make use of the PAT bits which is only
> required for DMA/MMIO from my understanding, we can safely ignore it.
> 
> Hyper-V uses this bit for kernel PTEs.
> 
> Signed-off-by: Alexander Graf <agraf@suse.de>
> ---
>  arch/x86/kvm/mmu.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
> index 8fcdae9..cce055a 100644
> --- a/arch/x86/kvm/mmu.c
> +++ b/arch/x86/kvm/mmu.c
> @@ -2169,7 +2169,7 @@ static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
>  		context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
>  			rsvd_bits(maxphyaddr, 51) |
>  			rsvd_bits(13, 20);		/* large page */
> -		context->rsvd_bits_mask[1][0] = ~0ull;
> +		context->rsvd_bits_mask[1][0] = 0ull;
>  		break;
>  	}
>  }

Just to make sure I understand what this does: if guest sets bit7, will
bit7 get set in shadow PTEs as well?

-- 
MST