From mboxrd@z Thu Jan 1 00:00:00 1970 From: Joerg Roedel Subject: Re: [PATCH 5/6] Nested SVM: Implement INVLPGA Date: Fri, 15 May 2009 15:43:02 +0200 Message-ID: <20090515134301.GX9835@amd.com> References: <1242375740-31222-1-git-send-email-agraf@suse.de> <1242375740-31222-2-git-send-email-agraf@suse.de> <1242375740-31222-3-git-send-email-agraf@suse.de> <1242375740-31222-4-git-send-email-agraf@suse.de> <1242375740-31222-5-git-send-email-agraf@suse.de> <1242375740-31222-6-git-send-email-agraf@suse.de> Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: QUOTED-PRINTABLE Cc: kvm@vger.kernel.org To: Alexander Graf Return-path: Received: from mail-sin.bigfish.com ([207.46.51.104]:54620 "EHLO mail224-sin-R.bigfish.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752008AbZEOODb convert rfc822-to-8bit (ORCPT ); Fri, 15 May 2009 10:03:31 -0400 Content-Disposition: inline In-Reply-To: <1242375740-31222-6-git-send-email-agraf@suse.de> Sender: kvm-owner@vger.kernel.org List-ID: On Fri, May 15, 2009 at 10:22:19AM +0200, Alexander Graf wrote: > SVM adds another way to do INVLPG by ASID which Hyper-V makes use of, > so let's implement it! >=20 > For now we just do the same thing invlpg does, as asid switching > means we flush the mmu anyways. That might change one day though. >=20 > Signed-off-by: Alexander Graf > --- > arch/x86/kvm/svm.c | 14 +++++++++++++- > 1 files changed, 13 insertions(+), 1 deletions(-) >=20 > diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c > index 30e6b43..b2c6cf3 100644 > --- a/arch/x86/kvm/svm.c > +++ b/arch/x86/kvm/svm.c > @@ -1785,6 +1785,18 @@ static int clgi_interception(struct vcpu_svm *= svm, struct kvm_run *kvm_run) > return 1; > } > =20 > +static int invlpga_interception(struct vcpu_svm *svm, struct kvm_run= *kvm_run) > +{ > + struct kvm_vcpu *vcpu =3D &svm->vcpu; > + nsvm_printk("INVLPGA\n"); > + svm->next_rip =3D kvm_rip_read(&svm->vcpu) + 3; > + skip_emulated_instruction(&svm->vcpu); > + > + kvm_mmu_reset_context(vcpu); > + kvm_mmu_load(vcpu); > + return 1; > +} > + Hmm, since we flush the TLB on every nested-guest entry I think we can make this function a nop. > static int invalid_op_interception(struct vcpu_svm *svm, > struct kvm_run *kvm_run) > { > @@ -2130,7 +2142,7 @@ static int (*svm_exit_handlers[])(struct vcpu_s= vm *svm, > [SVM_EXIT_INVD] =3D emulate_on_interception= , > [SVM_EXIT_HLT] =3D halt_interception, > [SVM_EXIT_INVLPG] =3D invlpg_interception, > - [SVM_EXIT_INVLPGA] =3D invalid_op_interception, > + [SVM_EXIT_INVLPGA] =3D invlpga_interception, > [SVM_EXIT_IOIO] =3D io_interception, > [SVM_EXIT_MSR] =3D msr_interception, > [SVM_EXIT_TASK_SWITCH] =3D task_switch_interception, > --=20 > 1.6.0.2 >=20 >=20 --=20 | Advanced Micro Devices GmbH Operating | Karl-Hammerschmidt-Str. 34, 85609 Dornach bei M=FCnchen System |=20 Research | Gesch=E4ftsf=FChrer: Thomas M. McCoy, Giuliano Meroni Center | Sitz: Dornach, Gemeinde Aschheim, Landkreis M=FCnchen | Registergericht M=FCnchen, HRB Nr. 43632