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From: "Michael S. Tsirkin" <mst@redhat.com>
To: Paul Brook <paul@codesourcery.com>, Avi Kivity <avi@redhat.com>,
	qemu-devel@nongnu.org, Carsten Otte <cotte@de.ibm.com>,
	kvm@vger.kernel.org, Rusty Russell <rusty@rustcorp.com.au>,
	vi
Subject: [PATCHv2 08/13] qemu: add support for resizing regions
Date: Tue, 2 Jun 2009 18:02:49 +0300	[thread overview]
Message-ID: <20090602150249.GI6554@redhat.com> (raw)
In-Reply-To: <cover.1243954694.git.mst@redhat.com>

Make it possible to resize PCI regions.  This will be used by virtio
with MSI-X, where the region size depends on whether MSI-X is enabled,
and can change across load/save.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
 hw/pci.c |   54 ++++++++++++++++++++++++++++++++++++------------------
 hw/pci.h |    3 +++
 2 files changed, 39 insertions(+), 18 deletions(-)

diff --git a/hw/pci.c b/hw/pci.c
index 31ba2ed..a63d988 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -392,6 +392,41 @@ void pci_register_io_region(PCIDevice *pci_dev, int region_num,
     *(uint32_t *)(pci_dev->mask + addr) = cpu_to_le32(mask);
 }
 
+static void pci_unmap_region(PCIDevice *d, PCIIORegion *r)
+{
+    if (r->addr == -1)
+        return;
+    if (r->type & PCI_ADDRESS_SPACE_IO) {
+        int class;
+        /* NOTE: specific hack for IDE in PC case:
+           only one byte must be mapped. */
+        class = pci_get_word(d->config + PCI_CLASS_DEVICE);
+        if (class == 0x0101 && r->size == 4) {
+            isa_unassign_ioport(r->addr + 2, 1);
+        } else {
+            isa_unassign_ioport(r->addr, r->size);
+        }
+    } else {
+        cpu_register_physical_memory(pci_to_cpu_addr(r->addr),
+                                     r->size,
+                                     IO_MEM_UNASSIGNED);
+        qemu_unregister_coalesced_mmio(r->addr, r->size);
+    }
+}
+
+void pci_resize_io_region(PCIDevice *pci_dev, int region_num,
+                          uint32_t size)
+{
+
+    PCIIORegion *r = &pci_dev->io_regions[region_num];
+    if (r->size == size)
+        return;
+    r->size = size;
+    pci_unmap_region(pci_dev, r);
+    r->addr = -1;
+    pci_update_mappings(pci_dev);
+}
+
 static void pci_update_mappings(PCIDevice *d)
 {
     PCIIORegion *r;
@@ -445,24 +480,7 @@ static void pci_update_mappings(PCIDevice *d)
             }
             /* now do the real mapping */
             if (new_addr != r->addr) {
-                if (r->addr != -1) {
-                    if (r->type & PCI_ADDRESS_SPACE_IO) {
-                        int class;
-                        /* NOTE: specific hack for IDE in PC case:
-                           only one byte must be mapped. */
-                        class = d->config[0x0a] | (d->config[0x0b] << 8);
-                        if (class == 0x0101 && r->size == 4) {
-                            isa_unassign_ioport(r->addr + 2, 1);
-                        } else {
-                            isa_unassign_ioport(r->addr, r->size);
-                        }
-                    } else {
-                        cpu_register_physical_memory(pci_to_cpu_addr(r->addr),
-                                                     r->size,
-                                                     IO_MEM_UNASSIGNED);
-                        qemu_unregister_coalesced_mmio(r->addr, r->size);
-                    }
-                }
+                pci_unmap_region(d, r);
                 r->addr = new_addr;
                 if (r->addr != -1) {
                     r->map_func(d, i, r->addr, r->size, r->type);
diff --git a/hw/pci.h b/hw/pci.h
index 6da626b..4072f16 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -221,6 +221,9 @@ void pci_register_io_region(PCIDevice *pci_dev, int region_num,
                             uint32_t size, int type,
                             PCIMapIORegionFunc *map_func);
 
+void pci_resize_io_region(PCIDevice *pci_dev, int region_num,
+                          uint32_t size);
+
 int pci_add_capability(PCIDevice *pci_dev, uint8_t cap_id, uint8_t cap_size);
 
 void pci_del_capability(PCIDevice *pci_dev, uint8_t cap_id, uint8_t cap_size);
-- 
1.6.3.1.56.g79e1.dirty


  parent reply	other threads:[~2009-06-02 15:06 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <cover.1243954694.git.mst@redhat.com>
2009-06-02 15:02 ` [PATCHv2 01/13] qemu: make default_write_config use mask table Michael S. Tsirkin
2009-06-02 15:02 ` [PATCHv2 02/13] qemu: capability bits in pci save/restore Michael S. Tsirkin
2009-06-02 15:02 ` [PATCHv2 03/13] qemu: add routines to manage PCI capabilities Michael S. Tsirkin
2009-06-02 15:02 ` [PATCHv2 04/13] qemu: helper routines for pci access Michael S. Tsirkin
2009-06-02 15:02 ` [PATCHv2 05/13] qemu: MSI-X support functions Michael S. Tsirkin
2009-06-02 15:02 ` [PATCHv2 06/13] qemu: add flag to disable MSI-X by default Michael S. Tsirkin
2009-06-02 15:02 ` [PATCHv2 07/13] qemu: minimal MSI/MSI-X implementation for PC Michael S. Tsirkin
2009-06-02 15:02 ` Michael S. Tsirkin [this message]
2009-06-02 15:02 ` [PATCHv2 09/13] qemu: virtio support for many interrupt vectors Michael S. Tsirkin
2009-06-02 15:03 ` [PATCHv2 10/13] qemu: MSI-X support in virtio PCI Michael S. Tsirkin
2009-06-02 15:03 ` [PATCHv2 11/13] qemu: request 3 vectors in virtio-net Michael S. Tsirkin
2009-06-02 15:03 ` [PATCHv2 12/13] qemu: virtio save/load bindings Michael S. Tsirkin
2009-06-02 15:03 ` [PATCHv2 13/13] qemu: add pci_get/set_byte Michael S. Tsirkin

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