From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sheng Yang Subject: Re: [PATCH 2/3] KVM: VMX: Simplify pdptr and cr3 management Date: Tue, 2 Jun 2009 17:30:37 +0800 Message-ID: <200906021730.38414.sheng@linux.intel.com> References: <1243862524-22120-1-git-send-email-avi@redhat.com> <200906021722.44103.sheng@linux.intel.com> <4A24F043.6070109@redhat.com> Mime-Version: 1.0 Content-Type: Text/Plain; charset=utf-8 Content-Transfer-Encoding: QUOTED-PRINTABLE Cc: kvm@vger.kernel.org, Marcelo Tosatti , Joerg Roedel To: Avi Kivity Return-path: Received: from mga10.intel.com ([192.55.52.92]:49332 "EHLO fmsmga102.fm.intel.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753398AbZFBJak convert rfc822-to-8bit (ORCPT ); Tue, 2 Jun 2009 05:30:40 -0400 In-Reply-To: <4A24F043.6070109@redhat.com> Content-Disposition: inline Sender: kvm-owner@vger.kernel.org List-ID: On Tuesday 02 June 2009 17:26:27 Avi Kivity wrote: > Sheng Yang wrote: > > On Monday 01 June 2009 21:22:02 Avi Kivity wrote: > >> Instead of reading the PDPTRs from memory after every exit (which = is > >> slow and wrong, as the PDPTRs are stored on the cpu), sync the PDP= TRs > >> from memory to the VMCS before entry, and from the VMCS to memory = after > >> exit. Do the same for cr3. > > > > Thanks for fixing! > > > > After review my original code, I found a potential bug. For SDM 3B = have > > this: > > > > 23.3.4 Saving Non-Register State > > ... > > If the logical processor supports the 1-setting of the =E2=80=9Cena= ble EPT=E2=80=9D VM- > > execution control, values are saved into the four (4) PDPTE fields = as > > follows: =E2=80=94 If the =E2=80=9Cenable EPT=E2=80=9D VM-execution= control is 1 and the logical > > processor was using PAE paging at the time of the VM exit, the PDPT= E > > values currently in use are saved: > > =E2=80=A2 The values saved into bits 11:9 of each of the fields is = undefined. > > =E2=80=A2 If the value saved into one of the fields has bit 0 (pres= ent) clear, > > the value saved into bits 63:1 of that field is undefined. That val= ue > > need not correspond to the value that was loaded by VM entry or to = any > > value that might have been loaded in VMX non-root operation. > > =E2=80=A2 If the value saved into one of the fields has bit 0 (pres= ent) set, the > > value saved into bits 63:12 of the field is a guest-physical addres= s. > > =E2=80=94 If the =E2=80=9Cenable EPT=E2=80=9D VM-execution control = is 0 or the logical processor > > was not using PAE paging at the time of the VM exit, the values sav= ed are > > undefined. > > > > But drop the ept_load_pdptrs() when exit and add it in cr0 handling > > result in Windows PAE guest hang on boot. I am checking it now. Any > > thoughts?... > > You mean with the new code? What version of Windows exactly? > > I'll check it out, though EPTs are a little hard to find here. No, no, not with the new code. For CPU can load pdptrs if EPT enabled w= ith PAE=20 from VM exit, there should not be necessary load it explicitly. So I es= timate=20 the ept_load_pdptr() in exit handler, and put it in CR0 handling. Just = tried=20 to optimize load-pdptr according to the spec, but not got the desired=20 result... So I am trying to find the failure reason... --=20 regards Yang, Sheng