Re: [PATCH 3/3] Update VMX_EPT_IDENTITY_PAGETABLE_ADDR to synchronize with kernel code.

Marcelo Tosatti
2009-07-16T19:46:32Z

On Thu, Jul 16, 2009 at 11:48:46AM -0700, Jordan Justen wrote:
> On Thu, 2009-07-16 at 11:18 -0700, Marcelo Tosatti wrote:
> > On Thu, Jul 16, 2009 at 11:02:22AM -0700, Jordan Justen wrote:
> > > Although VMX_EPT_IDENTITY_PAGETABLE_ADDR does not appear to be used within
> > > qemu-kvm, this change mirrors a similar change in the kernel kvm code.
> > >
> > > The purpose is to move the KVM 'EPT Identity Pages' from:
> > > 0xfffbc000-0xfffbcfff
> > > to:
> > > 0xfeffc000-0xfeffcfff
> > >
> > > The step is required to free up the 0xff000000-0xffffffff (16MB) range
> > > for use with bios.bin.
> > >
> > > The KVM kernel change depends upon a change to kvm/bios/rombios.c so the bios
> > > INT15-E820 function will properly reserve the new location.
> > >
> > > Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
> > > ---
> > > kvm/include/x86/asm/vmx.h | 2 +-
> > > 1 files changed, 1 insertions(+), 1 deletions(-)
> > >
> > > diff --git a/kvm/include/x86/asm/vmx.h b/kvm/include/x86/asm/vmx.h
> > > index df8d4f9..99e2bb9 100644
> > > --- a/kvm/include/x86/asm/vmx.h
> > > +++ b/kvm/include/x86/asm/vmx.h
> > > @@ -403,7 +403,7 @@ enum vmcs_field {
> > > #define VMX_EPT_EXECUTABLE_MASK 0x4ull
> > > #define VMX_EPT_IGMT_BIT (1ull << 6)
> > >
> > > -#define VMX_EPT_IDENTITY_PAGETABLE_ADDR 0xfffbc000ul
> > > +#define VMX_EPT_IDENTITY_PAGETABLE_ADDR 0xfeffc000ul
> >
> > Won't this conflict with an older BIOS? (the e820 reserved entry on
> > older qemu-kvm+bios will not cover the EPT identity table on kernels
> > with this patch).
> >
> > Perhaps add a new ioctl (similar to the tss one) to so userspace can set
> > the address?
>
> I am not very familiar with the reasons why the EPT identity
> page-table setup is happening within the kernel.
>
> As it stands, there is the shared knowledge that the qemu-kvm bios
> just happens to know that the kvm kernel code has reserved a
> particular page of the address space.
>
> It would be much easier to coordinate all the pieces if it were
> all setup on the qemu-kvm side.
>
> Is this possible?

It is possible but all of the EPT implementation is in the kernel, so it
does not make much sense to have the details of the identity table in
qemu-kvm.

The address of it though can be controlled by qemu-kvm.

Sheng?