Re: [PATCH 04/12] IOAPIC timer interrupt redirect.

[Marcelo Tosatti <mtosatti@redhat.com>]

On Tue, Dec 01, 2009 at 03:36:33PM +0100, Chris Lalancette wrote:
> Only redirect IRQ 0 (i.e. timer interrupt) to the BSP if
> the APIC destination is multiple vcpus.
> 
> Signed-off-by: Chris Lalancette <clalance@redhat.com>
> ---
>  virt/kvm/ioapic.c |   15 +++++++++++++--
>  1 files changed, 13 insertions(+), 2 deletions(-)
> 
> diff --git a/virt/kvm/ioapic.c b/virt/kvm/ioapic.c
> index 53f3166..fd52949 100644
> --- a/virt/kvm/ioapic.c
> +++ b/virt/kvm/ioapic.c
> @@ -144,6 +144,15 @@ static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
>  	}
>  }
>  
> +static int ioapic_dest_multiple_cpus(struct kvm_lapic_irq *irqe)
> +{
> +	/* physical mode is always directed to 1 cpu */
> +	if (irqe->dest_mode == 0 || irqe->dest_id == 0)
> +		return 0;
> +
> +	return hweight_long(irqe->dest_id) != 1;
> +}

A single ID can have more than one bit set :(

Better limit the override to delivery mode lowest priority (001).