From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sheng Yang Subject: Re: [PATCH 3/3] KVM: VMX: Enable EPT 1GB page support Date: Tue, 5 Jan 2010 18:51:03 +0800 Message-ID: <201001051851.03501.sheng@linux.intel.com> References: <1262686361-11630-1-git-send-email-sheng@linux.intel.com> <1262686361-11630-4-git-send-email-sheng@linux.intel.com> <4B4317C9.9040900@redhat.com> Mime-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Cc: Marcelo Tosatti , kvm@vger.kernel.org To: Avi Kivity Return-path: Received: from mga10.intel.com ([192.55.52.92]:9134 "EHLO fmsmga102.fm.intel.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753087Ab0AEKwt (ORCPT ); Tue, 5 Jan 2010 05:52:49 -0500 In-Reply-To: <4B4317C9.9040900@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: On Tuesday 05 January 2010 18:43:21 Avi Kivity wrote: > On 01/05/2010 12:12 PM, Sheng Yang wrote: > > Signed-off-by: Sheng Yang > > --- > > arch/x86/include/asm/vmx.h | 1 + > > arch/x86/kvm/mmu.c | 8 +++++--- > > arch/x86/kvm/vmx.c | 11 ++++++++++- > > 3 files changed, 16 insertions(+), 4 deletions(-) > > > > diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h > > index 713ed9a..43f1e9b 100644 > > --- a/arch/x86/include/asm/vmx.h > > +++ b/arch/x86/include/asm/vmx.h > > @@ -364,6 +364,7 @@ enum vmcs_field { > > #define VMX_EPTP_UC_BIT (1ull<< 8) > > #define VMX_EPTP_WB_BIT (1ull<< 14) > > #define VMX_EPT_2MB_PAGE_BIT (1ull<< 16) > > +#define VMX_EPT_1GB_PAGE_BIT (1ull<< 17) > > Can you share when this feature will be available in hardware? I think it should be with the 32nm Core i7 (at least highend server edition), slated for early 2010 release. > > > static int vmx_get_lpage_level(void) > > { > > - return 2; /* PT_DIRECTORY_LEVEL */ > > + if (enable_ept&& !cpu_has_vmx_ept_1g_page()) > > + return 2; /* PT_DIRECTORY_LEVEL */ > > + else > > + /* For shadow and EPT supported 1GB page */ > > + return 3; /* PT_PDPE_LEVEL */ > > } > > Why not use the defines instead of numbers? It will reduce change when > we change PT_*_LEVEL to be zero based instead of one based. Oh, sure (caused by a little chaos in mind...). Patch 1 is also affected(cpuid). Would resent the patchset soon. > > Patchset looks good; second patch should go into .33 and stable, no? > Sure. I would cc stable later. -- regards Yang, Sheng