From mboxrd@z Thu Jan 1 00:00:00 1970 From: Gleb Natapov Subject: Re: [PATCH] KVM: x86: Add instruction length to VCPU event state Date: Sat, 13 Feb 2010 21:25:40 +0200 Message-ID: <20100213192540.GD2511@redhat.com> References: <4B76762C.10107@web.de> <20100213152635.GA2511@redhat.com> <4B76E638.5010100@web.de> <20100213182253.GB2511@redhat.com> <4B76F25F.1060009@web.de> <20100213190615.GC2511@redhat.com> <4B76FB89.50107@web.de> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: Avi Kivity , Marcelo Tosatti , kvm To: Jan Kiszka Return-path: Received: from mx1.redhat.com ([209.132.183.28]:45320 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757562Ab0BMTZm (ORCPT ); Sat, 13 Feb 2010 14:25:42 -0500 Content-Disposition: inline In-Reply-To: <4B76FB89.50107@web.de> Sender: kvm-owner@vger.kernel.org List-ID: On Sat, Feb 13, 2010 at 08:20:41PM +0100, Jan Kiszka wrote: > Gleb Natapov wrote: > > On Sat, Feb 13, 2010 at 07:41:35PM +0100, Jan Kiszka wrote: > >> Gleb Natapov wrote: > >>> On Sat, Feb 13, 2010 at 06:49:44PM +0100, Jan Kiszka wrote: > >>>> Gleb Natapov wrote: > >>>>> On Sat, Feb 13, 2010 at 10:51:40AM +0100, Jan Kiszka wrote: > >>>>>> From: Jan Kiszka > >>>>>> > >>>>>> VMX requires a properly set instruction length VM entry field when > >>>>>> trying to inject soft exception and interrupts. We have to preserve this > >>>>>> state across VM save/restore to avoid breaking the re-injection of such > >>>>>> events on Intel. So add it to the new VCPU event state. > >>>>>> > >>>>> We shouldn't re-inject soft exceptions/interrupts after migration, but > >>>>> re-execute instruction instead. Instruction length field doesn't exist > >>>>> on SVM and migration shouldn't expose implementation details. > >>>>> > >>>> Hmm, then I guess this totally untested patch should fly: > >>>> > >>> I don't understand what problem are you trying to solve by your patch. > >>> During normal operation event_exit_inst_len will be set to correct > >>> value. After migration rip will point to int instruction an no even will > >>> be pending at all. Here is the patch: > >> The patch will cause an endless loop if BP interception is enabled. > >> > > How? This code path is not executed normally. > > Oh, I read it the other way around, but it is supposed to mask soft > exceptions/irqs (clearing *.injected is missing then). > > > > >> What is the purpose of keeping event_exit_inst_len around? Either we > >> need it also across user space exists, then we have to save/restore or > >> reconstruct it, or we don't need it, then simply drop it. > >> > > Why we need to save/restore is if we need it across user space exits? > > We need to save/restore it only if we nedd it across migration. > > > > When exception happens during soft interrupt/exception delivery soft i/e > > should be retried somehow. There are two ways to do that. First one is just > > reenter guest with the same rip. Instruction will be reexecuted and > > event redelivered. Another is to reinject event via event reinjection > > mechanism and for that we need to tell CPU how to calculate rip of a next > > instruction and this is done by providing event_exit_inst_len. The > > But I still fail to see the case where event_exit_inst_len is set to > anything but 1 or 2 and where it is related to anything else than exits > at INT3, INT X, or INTO. > You can't know real instruction length without decoding it or relying on VMX exit info. What if prefix were used for INT X? > > problem is that SVM supports only the first way. Intel advised us to use > > reinjection mechanism, so that what we use on VMX, but since migration > > can happen from Intel to AMD and vice versa we chose to reexecute > > instruction after migration on those rare occasions that migration > > happens exactly after intercepted soft i/e. > > Jan > -- Gleb.