From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paul Brook Subject: Re: [Qemu-devel] [PATCH] Inter-VM shared memory PCI device Date: Mon, 8 Mar 2010 13:03:44 +0000 Message-ID: <201003081303.45179.paul@codesourcery.com> References: <1267833161-25267-1-git-send-email-cam@cs.ualberta.ca> <201003072254.00040.paul@codesourcery.com> <4B94C8CD.2030808@redhat.com> Mime-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-15" Content-Transfer-Encoding: 7bit Cc: Avi Kivity , Cam Macdonell , kvm@vger.kernel.org To: qemu-devel@nongnu.org Return-path: Received: from mail.codesourcery.com ([38.113.113.100]:45416 "EHLO mail.codesourcery.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753709Ab0CHNDs (ORCPT ); Mon, 8 Mar 2010 08:03:48 -0500 In-Reply-To: <4B94C8CD.2030808@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: > On 03/08/2010 12:53 AM, Paul Brook wrote: > >> Support an inter-vm shared memory device that maps a shared-memory > >> object as a PCI device in the guest. This patch also supports > >> interrupts between guest by communicating over a unix domain socket. > >> This patch applies to the qemu-kvm repository. > > > > No. All new devices should be fully qdev based. > > > > I suspect you've also ignored a load of coherency issues, especially when > > not using KVM. As soon as you have shared memory in more than one host > > thread/process you have to worry about memory barriers. > > Shouldn't it be sufficient to require the guest to issue barriers (and > to ensure tcg honours the barriers, if someone wants this with tcg)?. In a cross environment that becomes extremely hairy. For example the x86 architecture effectively has an implicit write barrier before every store, and an implicit read barrier before every load. Paul