From mboxrd@z Thu Jan  1 00:00:00 1970
From: Paul Brook <paul@codesourcery.com>
Subject: Re: [Qemu-devel] [PATCH] Inter-VM shared memory PCI device
Date: Wed, 10 Mar 2010 11:13:10 +0000
Message-ID: <201003101113.11974.paul@codesourcery.com>
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Cc: Cam Macdonell <cam@cs.ualberta.ca>,
	Jamie Lokier <jamie@shareable.org>, qemu-devel@nongnu.org,
	kvm@vger.kernel.org
To: Avi Kivity <avi@redhat.com>
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> >> As of March 2009[1] Intel guarantees that memory reads occur in order
> >> (they may only be reordered relative to writes). It appears AMD do not
> >> provide this guarantee, which could be an interesting problem for
> >> heterogeneous migration..
> >
> > Interesting, but what ordering would cause problems that AMD would do
> > but Intel wouldn't?  Wouldn't that ordering cause the same problems
> > for POSIX shared memory in general (regardless of Qemu) on AMD?
> 
> If some code was written for the Intel guarantees it would break if
> migrated to AMD.  Of course, it would also break if run on AMD in the
> first place.

Right. This is independent of shared memory, and is a case where reporting an 
Intel CPUID on and AMD host might get you into trouble.

Paul