From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sheng Yang Subject: Re: [PATCH] KMV: VMX: consult IA32_VMX_EPT_VPID_CAP to determine EPT paging-structure memory type Date: Mon, 22 Mar 2010 17:13:26 +0800 Message-ID: <201003221713.26941.sheng@linux.intel.com> References: <4BA73322.5020001@cn.fujitsu.com> Mime-Version: 1.0 Content-Type: Text/Plain; charset="utf-8" Content-Transfer-Encoding: 7bit Cc: Avi Kivity , mtosatti@redhat.com, kvm@vger.kernel.org To: Gui Jianfeng Return-path: Received: from mga09.intel.com ([134.134.136.24]:16242 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753582Ab0CVJN3 (ORCPT ); Mon, 22 Mar 2010 05:13:29 -0400 In-Reply-To: <4BA73322.5020001@cn.fujitsu.com> Sender: kvm-owner@vger.kernel.org List-ID: On Monday 22 March 2010 17:06:42 Gui Jianfeng wrote: > According to SDM, we need to configure EPT paging-structure memory type > by consulting IA32_VMX_EPT_VPID_CAP. > > Signed-off-by: Gui Jianfeng > --- > arch/x86/include/asm/vmx.h | 2 ++ > arch/x86/kvm/vmx.c | 12 +++++++++--- > 2 files changed, 11 insertions(+), 3 deletions(-) > > diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h > index fb9a080..1b33a60 100644 > --- a/arch/x86/include/asm/vmx.h > +++ b/arch/x86/include/asm/vmx.h > @@ -374,6 +374,8 @@ enum vmcs_field { > #define VMX_EPT_MT_EPTE_SHIFT 3 > #define VMX_EPT_GAW_EPTP_SHIFT 3 > #define VMX_EPT_DEFAULT_MT 0x6ull > +#define VMX_EPT_MT_WRBACK 0x6ull > +#define VMX_EPT_MT_UNCACHABLE 0x0ull > #define VMX_EPT_READABLE_MASK 0x1ull > #define VMX_EPT_WRITABLE_MASK 0x2ull > #define VMX_EPT_EXECUTABLE_MASK 0x4ull > diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c > index 06108f3..f971b9b 100644 > --- a/arch/x86/kvm/vmx.c > +++ b/arch/x86/kvm/vmx.c > @@ -1804,9 +1804,15 @@ static u64 construct_eptp(unsigned long root_hpa) > { > u64 eptp; > > - /* TODO write the value reading from MSR */ > - eptp = VMX_EPT_DEFAULT_MT | > - VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT; > + if (cpu_has_vmx_eptp_writeback()) > + eptp = VMX_EPT_MT_WRBACK | > + VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT; I prefer to ensure WB is supported and used as default. Otherwise it would be a big trouble for memory subsystem(to use UC for all memory). Both WB and UC EPT memory types are ensured to be support in hardware. And you can remove VMX_EPT_DEFAULT_MT as well. -- regards Yang, Sheng > + else if (cpu_has_vmx_eptp_uncacheable()) > + eptp = VMX_EPT_MT_UNCACHABLE | > + VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT; > + else > + BUG(); > + > eptp |= (root_hpa & PAGE_MASK); > > return eptp; >