From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wright Subject: Re: [PATCH 0/1] uio_pci_generic: extensions to allow access for?non-privileged processes Date: Fri, 9 Apr 2010 13:09:08 -0700 Message-ID: <20100409200908.GM3168@sequoia.sous-sol.org> References: <201003311708.38961.pugs@lyon-about.com> <20100402170515.GA32579@suse.de> <4BBEFA3B.8070609@redhat.com> <201004090934.16891.pugs@lyon-about.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: Avi Kivity , Greg KH , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, "Hans J. Koch" To: Tom Lyon Return-path: Received: from sous-sol.org ([216.99.217.87]:45918 "EHLO sequoia.sous-sol.org" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1754961Ab0DIUJb (ORCPT ); Fri, 9 Apr 2010 16:09:31 -0400 Content-Disposition: inline In-Reply-To: <201004090934.16891.pugs@lyon-about.com> Sender: kvm-owner@vger.kernel.org List-ID: * Tom Lyon (pugs@lyon-about.com) wrote: > On Friday 09 April 2010 02:58:19 am Avi Kivity wrote: > > - access to all config space, but BARs must be translated so userspace > > cannot attack the host > Please elaborate. All of PCI config? All of PCIe config? Seems like a huge mess. All of config space, but not raw access to all bits. So the MSI/MSI-X capability writes need to be intermediated. There's bits in the header too. And it's not just PCI, it's extended config space as well, drivers may care about finding their whizzybang PCIe capability and doing someting with it (and worse...they are allowed to put device specific registers there, and worse yet...they do!). thanks, -chris