From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Roedel, Joerg" Subject: Re: [PATCH v5] KVM: VMX: Execute WBINVD to keep data consistency with assigned devices Date: Tue, 29 Jun 2010 14:28:28 +0200 Message-ID: <20100629122827.GC1788@amd.com> References: <4C286CCE.10309@redhat.com> <1277781419-13227-1-git-send-email-sheng@linux.intel.com> <20100629101403.GB1788@amd.com> <4C29CE89.6010206@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Cc: Sheng Yang , Marcelo Tosatti , Jan Kiszka , "kvm@vger.kernel.org" , "Yaozu (Eddie) Dong" To: Avi Kivity Return-path: Received: from tx2ehsobe004.messaging.microsoft.com ([65.55.88.14]:13663 "EHLO TX2EHSOBE007.bigfish.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752677Ab0F2M2y (ORCPT ); Tue, 29 Jun 2010 08:28:54 -0400 Content-Disposition: inline In-Reply-To: <4C29CE89.6010206@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: On Tue, Jun 29, 2010 at 06:44:25AM -0400, Avi Kivity wrote: > On 06/29/2010 01:14 PM, Roedel, Joerg wrote: > > On Mon, Jun 28, 2010 at 11:16:59PM -0400, Sheng Yang wrote: > > > >> Some guest device driver may leverage the "Non-Snoop" I/O, and explicitly > >> WBINVD or CLFLUSH to a RAM space. Since migration may occur before WBINVD or > >> CLFLUSH, we need to maintain data consistency either by: > >> 1: flushing cache (wbinvd) when the guest is scheduled out if there is no > >> wbinvd exit, or > >> 2: execute wbinvd on all dirty physical CPUs when guest wbinvd exits. > >> > > Sorry for jumping in late. This code is not required on AMD platforms > > because the io-page-tables for the AMD IOMMU have a FC bit (force > > coherent) that must just be set. The current code does not set this bit > > but I will prepare a patch for that. This wbinvd emulation code should > > be avoided where possible. > > > > Do you mean, KVM_IOMMU_CACHE_COHERENCY should be set for the AMD IOMMU? No, as far as I understand it the KVM_IOMMU_CACHE_COHERENCY flag is only there because there are VT-d IOMMUs that does not support the snoop force bit. In the AMD IOMMU case all hardware has this feature, the IOMMU driver just has to use it for IOMMU-API page-tables too. This is currently not the case. So this is only an IOMMU driver change. Joerg