From: "Nadav Har'El" <nyh@math.technion.ac.il>
To: Avi Kivity <avi@redhat.com>
Cc: kvm@vger.kernel.org
Subject: Re: [PATCH 13/24] Implement VMREAD and VMWRITE
Date: Wed, 4 Aug 2010 19:09:07 +0300 [thread overview]
Message-ID: <20100804160907.GC15156@fermat.math.technion.ac.il> (raw)
In-Reply-To: <4C15F802.7060106@redhat.com>
On Mon, Jun 14, 2010, Avi Kivity wrote about "Re: [PATCH 13/24] Implement VMREAD and VMWRITE":
> >+#ifdef CONFIG_X86_64
> >+ switch (vmcs_field_type(field)) {
> >+ case VMCS_FIELD_TYPE_U64: case VMCS_FIELD_TYPE_ULONG:
> >+ if (!is_long_mode(vcpu)) {
> >+ kvm_register_write(vcpu, reg+1, field_value>> 32);
> >
>
> What's this reg+1 thing? I thought vmread simply ignores the upper half.
Thanks. Now that I look at this, I really can't figure out what it was
supposed to be doing. Maybe it was supposed to attempt to support running
64-bit guests on a 32-bit host, or something, I don't know. Anyway, I
removed it now.
> >+ kvm_write_guest_virt_system(gva,&field_value,
> >+ vmcs_field_size(vmcs_field_type(field), vcpu),
> >+ vcpu, NULL);
> >
>
> vmread doesn't support 64-bit writes to memory outside long mode, so
> you'll have to truncate the write.
>
> I think you'll be better off returning a 32-bit size in
> vmcs_field_size() in these cases.
I think Gleb's correction (see my separate reply to him) was more accurate,
that the length of the write actually has nothing to do with the field size -
in 32-bit mode we always write 4 bytes, and in 64-bit mode, we always write 8
bytes - even if the given field to VMREAD was shorter or longer than those
sizes.
So now I have the code like this:
kvm_write_guest_virt_system(gva, &field_value,
(is_long_mode(vcpu) ? 8 : 4), vcpu, NULL);
> >+ if (!nested_map_current(vcpu)) {
> >+ printk(KERN_INFO "%s invalid shadow vmcs\n", __func__);
> >+ set_rflags_to_vmx_fail_invalid(vcpu);
> >+ return 1;
> >+ }
> >
>
> Can do the read_any() here.
Right, and indeed it will make the code look better. Thanks, done.
> >+ if (read_succeed) {
> >+ clear_rflags_cf_zf(vcpu);
> >+ skip_emulated_instruction(vcpu);
> >+ } else {
> >+ set_rflags_to_vmx_fail_valid(vcpu);
> >+ vmcs_write32(VM_INSTRUCTION_ERROR, 12);
> >
>
> s_e_i() in any case but an exception.
Yes, I missed a bunch of those and will be a lot more careful now.
Of course the vmcs_write32 above was also completely broken and I fixed it
to write to vmcs12 (I discussed this issue in a reply to a different patch).
> >+ kvm_read_guest_virt(gva,&field_value,
> >+ vmcs_field_size(field_type, vcpu), vcpu, NULL);
> >
>
> Check for exception.
I am not sure what I should really do here... In emulating VMWRITE, we
try to read from memory the pointer of where to store the result, and
kvm_read_guest_virt fails (return !=0). What shall I do in such a case,
queue a PF_VECTOR? Or did you have something else in mind?
Thanks, and I'm attaching below a newer version of this patch with most
of your comments fixed (except the one I asked about in the last paragraph).
Nadav.
----
Subject: [PATCH 14/26] nVMX: Implement VMREAD and VMWRITE
Implement the VMREAD and VMWRITE instructions. With these instructions, L1
can read and write to the VMCS it is holding. The values are read or written
to the fields of the vmcs_fields structure introduced in the previous patch.
Signed-off-by: Nadav Har'El <nyh@il.ibm.com>
---
arch/x86/kvm/vmx.c | 182 ++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 180 insertions(+), 2 deletions(-)
--- .before/arch/x86/kvm/vmx.c 2010-08-04 19:07:21.000000000 +0300
+++ .after/arch/x86/kvm/vmx.c 2010-08-04 19:07:21.000000000 +0300
@@ -4180,6 +4180,184 @@ static int handle_vmclear(struct kvm_vcp
return 1;
}
+enum vmcs_field_type {
+ VMCS_FIELD_TYPE_U16 = 0,
+ VMCS_FIELD_TYPE_U64 = 1,
+ VMCS_FIELD_TYPE_U32 = 2,
+ VMCS_FIELD_TYPE_ULONG = 3
+};
+
+static inline int vmcs_field_type(unsigned long field)
+{
+ if (0x1 & field) /* one of the *_HIGH fields, all are 32 bit */
+ return VMCS_FIELD_TYPE_U32;
+ return (field >> 13) & 0x3 ;
+}
+
+static inline int vmcs_field_size(int field_type, struct kvm_vcpu *vcpu)
+{
+ switch (field_type) {
+ case VMCS_FIELD_TYPE_U16:
+ return 2;
+ case VMCS_FIELD_TYPE_U32:
+ return 4;
+ case VMCS_FIELD_TYPE_U64:
+ return 8;
+ case VMCS_FIELD_TYPE_ULONG:
+ return is_long_mode(vcpu) ? 8 : 4;
+ }
+ BUG(); /* can never happen */
+}
+
+static inline int vmcs_field_readonly(unsigned long field)
+{
+ return (((field >> 10) & 0x3) == 1);
+}
+
+static inline bool vmcs12_read_any(struct kvm_vcpu *vcpu,
+ unsigned long field, u64 *ret)
+{
+ short offset = vmcs_field_to_offset(field);
+ char *p;
+
+ if (offset < 0)
+ return 0;
+
+ p = ((char *)(get_vmcs12_fields(vcpu))) + offset;
+
+ switch (vmcs_field_type(field)) {
+ case VMCS_FIELD_TYPE_ULONG:
+ *ret = *((unsigned long *)p);
+ return 1;
+ case VMCS_FIELD_TYPE_U16:
+ *ret = (u16) *((unsigned long *)p);
+ return 1;
+ case VMCS_FIELD_TYPE_U32:
+ *ret = (u32) *((unsigned long *)p);
+ return 1;
+ case VMCS_FIELD_TYPE_U64:
+ *ret = *((u64 *)p);
+ return 1;
+ default:
+ return 0; /* can never happen. */
+ }
+}
+
+static int handle_vmread(struct kvm_vcpu *vcpu)
+{
+ unsigned long field;
+ u64 field_value;
+ unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
+ u32 vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
+ gva_t gva = 0;
+
+ if (!nested_vmx_check_permission(vcpu))
+ return 1;
+
+ /* decode instruction info and find the field to read */
+ field = kvm_register_read(vcpu, (((vmx_instruction_info) >> 28) & 0xf));
+ if(!vmcs12_read_any(vcpu, field, &field_value)){
+ nested_vmx_failValid(vcpu, VMXERR_UNSUPPORTED_VMCS_COMPONENT);
+ skip_emulated_instruction(vcpu);
+ return 1;
+ }
+
+ /*
+ * and now check if reuqest to put the value in register or memory.
+ * Note that the number of bits actually written is 32 or 64 depending
+ * in the mode, not on the given field's length.
+ */
+ if (vmx_instruction_info & (1u << 10)) {
+ kvm_register_write(vcpu, (((vmx_instruction_info) >> 3) & 0xf),
+ field_value);
+ } else {
+ if (get_vmx_mem_address(vcpu, exit_qualification,
+ vmx_instruction_info, &gva))
+ return 1;
+ /* ok to use *_system, because handle_vmread verified cpl=0 */
+ kvm_write_guest_virt_system(gva, &field_value,
+ (is_long_mode(vcpu) ? 8 : 4), vcpu, NULL);
+ }
+
+ nested_vmx_succeed(vcpu);
+ skip_emulated_instruction(vcpu);
+ return 1;
+}
+
+
+static int handle_vmwrite(struct kvm_vcpu *vcpu)
+{
+ unsigned long field;
+ u64 field_value = 0;
+ gva_t gva;
+ int field_type;
+ unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
+ u32 vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
+ char *p;
+ short offset;
+
+ if (!nested_vmx_check_permission(vcpu))
+ return 1;
+
+ field = kvm_register_read(vcpu, (((vmx_instruction_info) >> 28) & 0xf));
+
+ if (vmcs_field_readonly(field)) {
+ nested_vmx_failValid(vcpu,
+ VMXERR_VMWRITE_READ_ONLY_VMCS_COMPONENT);
+ skip_emulated_instruction(vcpu);
+ return 1;
+ }
+
+ field_type = vmcs_field_type(field);
+
+ offset = vmcs_field_to_offset(field);
+ if (offset < 0) {
+ nested_vmx_failValid(vcpu, VMXERR_UNSUPPORTED_VMCS_COMPONENT);
+ skip_emulated_instruction(vcpu);
+ return 1;
+ }
+ p = ((char *) get_vmcs12_fields(vcpu)) + offset;
+
+ if (vmx_instruction_info & (1u << 10))
+ field_value = kvm_register_read(vcpu,
+ (((vmx_instruction_info) >> 3) & 0xf));
+ else {
+ if (get_vmx_mem_address(vcpu, exit_qualification,
+ vmx_instruction_info, &gva))
+ return 1;
+ kvm_read_guest_virt(gva, &field_value,
+ vmcs_field_size(field_type, vcpu), vcpu, NULL);
+ }
+
+ switch (field_type) {
+ case VMCS_FIELD_TYPE_U16:
+ *(u16 *)p = field_value;
+ break;
+ case VMCS_FIELD_TYPE_U32:
+ *(u32 *)p = field_value;
+ break;
+ case VMCS_FIELD_TYPE_U64:
+#ifdef CONFIG_X86_64
+ *(unsigned long *)p = field_value;
+#else
+ *(unsigned long *)p = field_value;
+ *(((unsigned long *)p)+1) = field_value >> 32;
+#endif
+ break;
+ case VMCS_FIELD_TYPE_ULONG:
+ *(unsigned long *)p = field_value;
+ break;
+ default:
+ nested_vmx_failValid(vcpu, VMXERR_UNSUPPORTED_VMCS_COMPONENT);
+ skip_emulated_instruction(vcpu);
+ return 1;
+ }
+
+ nested_vmx_succeed(vcpu);
+ skip_emulated_instruction(vcpu);
+ return 1;
+}
+
static bool verify_vmcs12_revision(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
{
if (vmcs12->revision_id == VMCS12_REVISION)
@@ -4546,9 +4724,9 @@ static int (*kvm_vmx_exit_handlers[])(st
[EXIT_REASON_VMLAUNCH] = handle_vmx_insn,
[EXIT_REASON_VMPTRLD] = handle_vmptrld,
[EXIT_REASON_VMPTRST] = handle_vmptrst,
- [EXIT_REASON_VMREAD] = handle_vmx_insn,
+ [EXIT_REASON_VMREAD] = handle_vmread,
[EXIT_REASON_VMRESUME] = handle_vmx_insn,
- [EXIT_REASON_VMWRITE] = handle_vmx_insn,
+ [EXIT_REASON_VMWRITE] = handle_vmwrite,
[EXIT_REASON_VMOFF] = handle_vmoff,
[EXIT_REASON_VMON] = handle_vmon,
[EXIT_REASON_TPR_BELOW_THRESHOLD] = handle_tpr_below_threshold,
--
Nadav Har'El | Wednesday, Aug 4 2010, 25 Av 5770
nyh@math.technion.ac.il |-----------------------------------------
Phone +972-523-790466, ICQ 13349191 |I am the boss of the house, and I have my
http://nadav.harel.org.il |wife's permission to say so!
next prev parent reply other threads:[~2010-08-04 16:09 UTC|newest]
Thread overview: 147+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-06-13 12:22 [PATCH 0/24] Nested VMX, v5 Nadav Har'El
2010-06-13 12:23 ` [PATCH 1/24] Move nested option from svm.c to x86.c Nadav Har'El
2010-06-14 8:11 ` Avi Kivity
2010-06-15 14:27 ` Nadav Har'El
2010-06-13 12:23 ` [PATCH 2/24] Add VMX and SVM to list of supported cpuid features Nadav Har'El
2010-06-14 8:13 ` Avi Kivity
2010-06-15 14:31 ` Nadav Har'El
2010-06-13 12:24 ` [PATCH 3/24] Implement VMXON and VMXOFF Nadav Har'El
2010-06-14 8:21 ` Avi Kivity
2010-06-16 11:14 ` Nadav Har'El
2010-06-16 11:26 ` Avi Kivity
2010-06-15 20:18 ` Marcelo Tosatti
2010-06-16 7:50 ` Nadav Har'El
2010-06-13 12:24 ` [PATCH 4/24] Allow setting the VMXE bit in CR4 Nadav Har'El
2010-06-15 11:09 ` Gleb Natapov
2010-06-15 14:44 ` Nadav Har'El
2010-06-13 12:25 ` [PATCH 5/24] Introduce vmcs12: a VMCS structure for L1 Nadav Har'El
2010-06-14 8:33 ` Avi Kivity
2010-06-14 8:49 ` Nadav Har'El
2010-06-14 12:35 ` Avi Kivity
2010-06-16 12:24 ` Nadav Har'El
2010-06-16 13:10 ` Avi Kivity
2010-06-22 14:54 ` Nadav Har'El
2010-06-22 16:53 ` Nadav Har'El
2010-06-23 8:07 ` Avi Kivity
2010-08-08 15:09 ` Nadav Har'El
2010-08-10 3:24 ` Avi Kivity
2010-06-23 7:57 ` Avi Kivity
2010-06-23 9:15 ` Alexander Graf
2010-06-23 9:24 ` Avi Kivity
2010-06-23 12:07 ` Nadav Har'El
2010-06-23 12:13 ` Avi Kivity
2010-06-13 12:25 ` [PATCH 6/24] Implement reading and writing of VMX MSRs Nadav Har'El
2010-06-14 8:42 ` Avi Kivity
2010-06-23 8:13 ` Nadav Har'El
2010-06-23 8:24 ` Avi Kivity
2010-06-13 12:26 ` [PATCH 7/24] Understanding guest pointers to vmcs12 structures Nadav Har'El
2010-06-14 8:48 ` Avi Kivity
2010-08-02 12:25 ` Nadav Har'El
2010-08-02 13:38 ` Avi Kivity
2010-06-15 12:14 ` Gleb Natapov
2010-08-01 15:16 ` Nadav Har'El
2010-08-01 15:25 ` Gleb Natapov
2010-08-02 8:57 ` Nadav Har'El
2010-06-13 12:26 ` [PATCH 8/24] Hold a vmcs02 for each vmcs12 Nadav Har'El
2010-06-14 8:57 ` Avi Kivity
2010-07-06 9:50 ` Dong, Eddie
2010-08-02 13:38 ` Nadav Har'El
2010-06-13 12:27 ` [PATCH 9/24] Implement VMCLEAR Nadav Har'El
2010-06-14 9:03 ` Avi Kivity
2010-06-15 13:47 ` Gleb Natapov
2010-06-15 13:50 ` Avi Kivity
2010-06-15 13:54 ` Gleb Natapov
2010-08-05 11:50 ` Nadav Har'El
2010-08-05 11:53 ` Gleb Natapov
2010-08-05 12:01 ` Nadav Har'El
2010-08-05 12:05 ` Avi Kivity
2010-08-05 12:10 ` Nadav Har'El
2010-08-05 12:13 ` Avi Kivity
2010-08-05 12:29 ` Nadav Har'El
2010-08-05 12:03 ` Avi Kivity
2010-07-06 2:56 ` Dong, Eddie
2010-08-03 12:12 ` Nadav Har'El
2010-06-13 12:27 ` [PATCH 10/24] Implement VMPTRLD Nadav Har'El
2010-06-14 9:07 ` Avi Kivity
2010-08-05 11:13 ` Nadav Har'El
2010-06-16 13:36 ` Gleb Natapov
2010-07-06 3:09 ` Dong, Eddie
2010-08-05 11:35 ` Nadav Har'El
2010-06-13 12:28 ` [PATCH 11/24] Implement VMPTRST Nadav Har'El
2010-06-14 9:15 ` Avi Kivity
2010-06-16 13:53 ` Gleb Natapov
2010-06-16 15:33 ` Nadav Har'El
2010-06-13 12:28 ` [PATCH 12/24] Add VMCS fields to the vmcs12 Nadav Har'El
2010-06-14 9:24 ` Avi Kivity
2010-06-16 14:18 ` Gleb Natapov
2010-06-13 12:29 ` [PATCH 13/24] Implement VMREAD and VMWRITE Nadav Har'El
2010-06-14 9:36 ` Avi Kivity
2010-06-16 14:48 ` Gleb Natapov
2010-08-04 13:42 ` Nadav Har'El
2010-08-04 16:09 ` Nadav Har'El [this message]
2010-08-04 16:41 ` Avi Kivity
2010-06-16 15:03 ` Gleb Natapov
2010-08-04 11:46 ` Nadav Har'El
2010-06-13 12:29 ` [PATCH 14/24] Prepare vmcs02 from vmcs01 and vmcs12 Nadav Har'El
2010-06-14 11:11 ` Avi Kivity
2010-06-17 8:50 ` Gleb Natapov
2010-07-06 6:25 ` Dong, Eddie
2010-06-13 12:30 ` [PATCH 15/24] Move register-syncing to a function Nadav Har'El
2010-06-13 12:30 ` [PATCH 16/24] Implement VMLAUNCH and VMRESUME Nadav Har'El
2010-06-14 11:41 ` Avi Kivity
2010-09-26 11:14 ` Nadav Har'El
2010-09-26 12:56 ` Avi Kivity
2010-09-26 13:06 ` Nadav Har'El
2010-09-26 13:51 ` Avi Kivity
2010-06-17 10:59 ` Gleb Natapov
2010-09-16 16:06 ` Nadav Har'El
2010-06-13 12:31 ` [PATCH 17/24] No need for handle_vmx_insn function any more Nadav Har'El
2010-06-13 12:31 ` [PATCH 18/24] Exiting from L2 to L1 Nadav Har'El
2010-06-14 12:04 ` Avi Kivity
2010-09-12 14:05 ` Nadav Har'El
2010-09-12 14:29 ` Avi Kivity
2010-09-12 17:05 ` Nadav Har'El
2010-09-12 17:21 ` Avi Kivity
2010-09-12 19:51 ` Nadav Har'El
2010-09-13 8:48 ` Avi Kivity
2010-09-13 5:53 ` Sheng Yang
2010-09-13 8:52 ` Avi Kivity
2010-09-13 9:01 ` Nadav Har'El
2010-09-13 9:34 ` Avi Kivity
2010-09-14 13:07 ` Nadav Har'El
2010-06-13 12:32 ` [PATCH 19/24] Deciding if L0 or L1 should handle an L2 exit Nadav Har'El
2010-06-14 12:24 ` Avi Kivity
2010-09-16 14:42 ` Nadav Har'El
2010-06-13 12:32 ` [PATCH 20/24] Correct handling of interrupt injection Nadav Har'El
2010-06-14 12:29 ` Avi Kivity
2010-06-14 12:48 ` Avi Kivity
2010-09-16 15:25 ` Nadav Har'El
2010-06-13 12:33 ` [PATCH 21/24] Correct handling of exception injection Nadav Har'El
2010-06-13 12:33 ` [PATCH 22/24] Correct handling of idt vectoring info Nadav Har'El
2010-06-17 11:58 ` Gleb Natapov
2010-09-20 6:37 ` Nadav Har'El
2010-09-20 9:34 ` Gleb Natapov
2010-09-20 10:03 ` Nadav Har'El
2010-09-20 10:11 ` Avi Kivity
2010-09-22 23:15 ` Nadav Har'El
2010-09-26 15:14 ` Avi Kivity
2010-09-26 15:18 ` Gleb Natapov
2010-09-20 10:20 ` Gleb Natapov
2010-06-13 12:34 ` [PATCH 23/24] Handling of CR0.TS and #NM for Lazy FPU loading Nadav Har'El
2010-06-13 12:34 ` [PATCH 24/24] Miscellenous small corrections Nadav Har'El
2010-06-14 12:34 ` [PATCH 0/24] Nested VMX, v5 Avi Kivity
2010-06-14 13:03 ` Nadav Har'El
2010-06-15 10:00 ` Avi Kivity
2010-10-17 12:03 ` Nadav Har'El
2010-10-17 12:10 ` Avi Kivity
2010-10-17 12:39 ` Nadav Har'El
2010-10-17 13:35 ` Avi Kivity
2010-07-09 8:59 ` Dong, Eddie
2010-07-11 8:27 ` Nadav Har'El
2010-07-11 11:05 ` Alexander Graf
2010-07-11 12:49 ` Nadav Har'El
2010-07-11 13:12 ` Avi Kivity
2010-07-11 15:39 ` Nadav Har'El
2010-07-11 15:45 ` Avi Kivity
2010-07-11 13:20 ` Avi Kivity
2010-07-15 3:27 ` Sheng Yang
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