From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Michael S. Tsirkin" Subject: Re: [PATCH 0/8][v2] MSI-X mask emulation support for assigned device Date: Thu, 21 Oct 2010 10:21:40 +0200 Message-ID: <20101021082140.GF27985@redhat.com> References: <1287563192-29685-1-git-send-email-sheng@linux.intel.com> <20101020190224.GA4089@amt.cnet> <201010211510.19200.sheng@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: Marcelo Tosatti , Avi Kivity , kvm@vger.kernel.org To: Sheng Yang Return-path: Received: from mx1.redhat.com ([209.132.183.28]:47728 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753163Ab0JUI2K (ORCPT ); Thu, 21 Oct 2010 04:28:10 -0400 Content-Disposition: inline In-Reply-To: <201010211510.19200.sheng@linux.intel.com> Sender: kvm-owner@vger.kernel.org List-ID: On Thu, Oct 21, 2010 at 03:10:19PM +0800, Sheng Yang wrote: > On Thursday 21 October 2010 03:02:24 Marcelo Tosatti wrote: > > On Wed, Oct 20, 2010 at 04:26:24PM +0800, Sheng Yang wrote: > > > Here is v2. > > > > > > Changelog: > > > > > > v1->v2 > > > > > > The major change from v1 is I've added the in-kernel MSI-X mask emulation > > > support, as well as adding shortcuts for reading MSI-X table. > > > > > > I've taken Michael's advice to use mask/unmask directly, but unsure about > > > exporting irq_to_desc() for module... > > > > > > Also add flush_work() according to Marcelo's comments. > > > > > > Sheng Yang (8): > > > PCI: MSI: Move MSI-X entry definition to pci_regs.h > > > irq: Export irq_to_desc() to modules > > > KVM: x86: Enable ENABLE_CAP capability for x86 > > > KVM: Move struct kvm_io_device to kvm_host.h > > > KVM: Add kvm_get_irq_routing_entry() func > > > KVM: assigned dev: Preparation for mask support in userspace > > > KVM: assigned dev: Introduce io_device for MSI-X MMIO accessing > > > KVM: Emulation MSI-X mask bits for assigned devices > > > > Why does the current scheme, without msix per-vector mask support, is > > functional at all? Luck? > > Well, I believe we are lucky... We just ignored the operation in the past. > > I had raised this issue when Michael begin to work on MSI-X support in QEmu long > ago, but then I was busy on some other things. Until now when Eddie want to add > MSI-X in-kernel acceleration, we back to it... > > And about the "flush_work()" you commented, I still think even for the native > device, it's possible that the short time after OS write to the mask bit, the > interrupt may be delivered, if the device already send the message out on the > bus(I just guess, haven't observed)... The spec didn't say that the finish of > writing mask bit behavior would also get all message on the bus delivered. So I > think leave the work a little late would also be fine. Yes ... but e.g. bus read afterwards would have to flush the write up the bus... > -- > regards > Yang, Sheng